Chinese Physics B, Volume. 29, Issue 10, (2020)

Simulation study of device physics and design of GeOI TFET with PNN structure and buried layer for high performance

Bin Wang1、†, Sheng Hu1, Yue Feng1, Peng Li2, Hui-Yong Hu1, and Bin Shu1
Author Affiliations
  • 1State Key Discipline Laboratory of Wide Bandgap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 7007, China
  • 2Xi’an Microelectronic Technology Institute, Xi’an 710054, China
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    Bin Wang, Sheng Hu, Yue Feng, Peng Li, Hui-Yong Hu, Bin Shu. Simulation study of device physics and design of GeOI TFET with PNN structure and buried layer for high performance[J]. Chinese Physics B, 2020, 29(10):

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    Paper Information

    Received: Apr. 23, 2020

    Accepted: --

    Published Online: Apr. 21, 2021

    The Author Email: Wang Bin (wbin@xidian.edu.cn)

    DOI:10.1088/1674-1056/ab99b5

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