Gallium nitride (GaN) is one of the most promising semiconductors. Its significant bandgap of 3.43 eV, high electric breakdown field of 3.3 MV/cm, low intrinsic carrier concentration, and large saturation velocity of 2.5 × 10⁷ cm/s are the reasons behind GaN potential as a semiconductor for high-power, high−frequency, and high-temperature electronics^{[1, 2]}_.

However, in AlGaN/GaN high-electron-mobility transistor (HEMT), the surface state of the AlGaN layer can lead to current collapse (C_collapse) and consequent reliability degradation^[3]. It is widely accepted that the surface state induces a virtual gate effect, which leads to device degradation in HEMT^[4]. Some studies have shown that thermal annealing of the medium and in-situ plasma surface treatment can effectively reduce the surface suspension bonds and inhibit traps^[5]. Growing a SiN_X layer via plasma enhanced chemical vapor deposition (PECVD) as a passivation layer is a common approach to preventing C_collapse. However, some researchers have warned that the use of plasma in PECVD may cause damage to the surface of HEMT. This might result in a detrimental rise in gate leakage current, which lowers the dependability of the device^[6]. Surface damage to the semiconductor leads to the formation of surface traps, surface erosion, and dangling bond defects. It will result in less of the passivation effect^[7]. Low-damage passivation of (Al)GaN can be achieved through the use of alternative methods, such as low pressure chemical vapor deposition (LPCVD) and plasma enhanced atomic layer deposition (PEALD).

However, these approaches are associated with the drawbacks of longer processing times, higher costs, and elevated temperatures required for the formation of a protective film^{[8, 9]}.

Nevertheless, obtaining lower gate leakage and C_collapse at the same time is still a difficult task. Tantalum nitride (TaN) film has the advantages of high temperature resistance, high melting point, acid and alkali resistance. Some recent studies utilize TaN as the gate electrode material for GaN HEMTs, aiming to achieve low resistivity, enhanced adhesion, improved high-temperature tolerance, and compatibility with complementary metal oxide semiconductor (CMOS) technology by using low-resistance TaN as the gate material^{[10, 11]}. And studies have shown that the changes in nitrogen content, sputtering pressure, and power will affect the crystal structure and electrical characteristics of TaN films^{[12, 13]}.

In this paper, we use a high-resistance TaN film, which is prepared through magnetron sputtering, as the gate dielectric layer of the AlGaN/GaN HEMT device. And provide an electrical description of the HEMT device, with a particular emphasis on current leakage and collapse. In this device, a low current leakage of 2.15 × 10⁻⁷ mA/mm and a breakdown voltage of 1180 V were noted. Furthermore, during dynamic tests, the metal insulating semiconductor (MIS) HEMT demonstrated remarkable operational stability; even under 400 V of stress, the dynamic resistance was just 1.39 times.

The multilayer structure of AlGaN/GaN HEMT devices is formed via metal organic chemical vapor deposition (MOCVD) onto a p-type Si (111) substrate. The structure is made up of several layers: a GaN buffer layer measuring 3.5 μm, a GaN channel layer measuring 200 nm, an AlN insertion layer measuring 1 nm, a layer that acts as a barrier of 25 nm Al_0.23GaN, and a cap layer of 2.5 nm GaN. F-ion implantation is used for device isolation as the initial stage in the manufacturing process. Ti/Al/Ni/Au (20/130/50/50 nm) alloys were applied in the source and drain, which were formed using lithography techniques. Ohmic contact was created by annealing the material.

Using the magnetron sputtering technique, a TaN film was created at 150 W sputtering power and a vacuum pressure of 6.5 × 10⁻⁶ Pa. During the preparation process, the proportion of nitrogen and argon was changed to increase the proportion of nitrogen in the TaN film, which raised the resistance rating of the film to a state of high resistance. The film was prepared using the most stable experimental parameters, and the resistance of TaN films was evaluated at room temperature using a four−probe resistance meter and a multimeter, and it has been shown that the generated TaN layers had high resistance.

For gate dielectric layers, a pair of different kinds of thin film are employed: (1) TaN film; and (2) Al₂O₃ film for MIS HEMT devices. Electron beam evaporation is used to deposit Ni/Au (50 nm/150 nm) metal as the gate metal, and a lift−off procedure is used to make the gate electrode. To create windows in the ohmic metal layer, a dry etching procedure is then carried out utilizing inductively couple plasma (ICP) etching equipment. In Fig. 1(a), the device structure diagram is illustrated. The features of this device are as follows: W_g = 100 μm gate width, L_g = 4 μm gate length of sentence, 5 μm source−drain separation, and 16 μm gate−drain separation. The layer for both of these devices is 20 nm thick. Sample A represents the HEMT device with TaN as the gate dielectric layer, and Sample B represents the HEMT device with Al₂O₃ as the gate dielectric layer.

All samples' direct-current transfer patterns are illustrated in Fig. 1(b). The gate voltage was scanned from −12 to 3 V and returned to −12 V without any noticeable threshold hysteresis. At a V_ds of 5 V, the devices' respective V_th were −6.6 and −6.4 V. The off-state drain leakage current is primarily attributed to the gate electrode, as the drain current (I_d) approaches the gate current (I_g) in the off-state for all samples. Sample A displayed an off-state current leakage of 2.15 × 10⁻⁷ mA/mm, whereas 2.31 × 10⁻⁵ mA/mm was observed in Sample B.

The on-state current and off-state current ratio (I_on/I_off) for Sample A was more than 10⁹, which is two orders of magnitude higher than that of Sample B. This phenomenon indicates that the TaN gate dielectric layer reduces gate leakage current, thereby reducing the overall I_D of the devices in the off-state. Fig. 1(d) demonstrates the results of other reported works on leakage current^{[5, 14−19]}. Overall, Sample A indicates improved suppression of gate leakage as compared to other types of dielectric layers, suggesting that it is suitable for use as a gate dielectric film.

Applying X−ray photoelectron spectroscopy (XPS), the band's offset of GaN/TaN was determined (Fig. 2). The energy bandgap (E_g) of the TaN (6.37 eV) was determined by the energy loss spectra of N 1s^[20]. From the linear fit of valence band spectra, the valence band maximums (VBM) of TaN (2.48 eV) and GaN (2.62 eV) were determined. Consequently, it was determined that the ΔE_c between TaN and GaN was 3.11 eV, which is considerably greater than the ΔE_c between GaN and another dielectric layer that was reported in previous investigations^[21]. The large ΔE_c along the interface between the insulator and AlGaN is essential for effectively reducing the current leakage^[22], thereby elucidating the excellent gate leakage suppression capability of Sample A, as depicted in Fig. 1(b).

DC magnetron sputtering offers significant potential and advantages in the production process of HEMT devices compared to other gate dielectric layer growth methods, such as PEALD, PECVD, and LPCVD. These advantages include low growth temperature, good temperature stability, low plasma damage, and high-quality film^[23]. Fig. 3(a) shows that Sample A has good leakage suppression ability in forward bias conditions. At a voltage of V_GS = 11 V, the gate leakage is I_g ~ 2 × 10⁻⁷ mA/mm, and V_gs-max can reach around 23 V^[24]. Nevertheless, when the gate voltage bias exceeds 17.7 V for the Al₂O₃ device, the leakage current rises fast. By comparing the gate breakdown voltages of the two samples, the corresponding breakdown field strengths were found to be 11.5 and 8.87 MV/cm, respectively. This outcome indicates that TaN as a gate dielectric layer offers advantages in enhancing the performance of semiconductor devices and their ability to withstand extreme operating conditions.

The breakdown voltage test profile with the device is displayed in Fig. 3(b). The MIS HEMT device with a gate−drain distance (L_gd) of 16 µm is depicted in the accompanying picture, along with its drain current (I_d), substrate leakage current (I_sub), and gate leakage current (I_g). The breakdown voltage (BV) of Sample A is approximately 93.5% higher than that of Sample B when I_D = 1 mA/mm (BV = 620 V), the TaN as gate dielectric layer performs exceptionally well in terms of power regulation. This means that the stability of the device at high voltages can be ensured by the TaN gate dielectric layer.

The I_d leakage current across the gate and drain is referred to as I_g, while the I_d vertical direction of the leakage current at V_gs = 0 V is referred to as I_sub. The values of I_sub, I_g, and I_d are allowed when V_ds is less than 500 V, and I_d and I_g nearly coincide. The drain between gate electrodes is the leakage route, and it is made up of TaN/AlGaN interface leakage. This suggests that the primary cause of I_d is horizontal leakage at low pressure, and the small leakage there suggests that the TaN gate dielectric layer can effectively reduce the drain between gate electrodes^[25]. When V_ds > 500 V, I_G is still very slow with the increase of V_ds, but I_sub increases rapidly and leads to the breakdown of the device at 1180 V, because when the substrate is grounded, the off-state leakage of the device at low voltage is contributed by the gate leakage. The interface leakage is not dominating at high voltage^[26]. The off-state leakage of the device is mostly produced by the vertical leakage of material, which is primarily brought on by the field of electricity directed vertically through the material. As a result, to raise the breakdown voltage of the device, the resistivity and thickness of the buffer must be increased to enhance the voltage resistance of the substance in a vertical direction.

One of the most important reliability problems with GaN HEMT devices is the current collapse, which is intimately related to surface and defect states. In this work, we used the Agilent B1505A testing module to analyze and describe the current collapse of our HEMT device. Fig. 4(a) displays the present collapse characteristics of Sample A. The device was evaluated with drain stress (V_ds ranging from 0 to 400 V) and gate V_gs = −10 V, with a stress duration of 10 ms. In the open condition, the V_ds was set to 1 V and the V_gs was set to 3 V. The time interval that separated the closed from the open states was 200 µs.

With off-state stress, the resistance of the device rises. Sample A provides good dynamic performance under the same stress bias, and the C_collapse of Sample A under 400 V stress bias is reduced by 41.1% compared to that of Sample B^[27]. The surface passivation of the device layer of TaN produced by magnetron sputtering efficiently inhibits the current collapse phenomenon. There are a few possible causes for the low-current collapse features: Firstly, since the surface states of the device are situated on the TaN surface rather than the AlGaN surface and the TaN layer, generated through magnetron sputtering, covers the AlGaN surface, it becomes harder to capture 2DEG via surface states. Secondary, high-quality dielectric films could be generated via magnetron sputtering, which also avoids the introduction of new interfacial states^[28−30].

TaN could be generated under a high vacuum as well as at lower temperatures using magnetron sputtering, which effectively stops surface oxides and nitrides from forming on the device^[31]. Additionally, secondary electrons produced by magnetron sputtering are accelerated into high-energy electrons in the cathode potential drop area rather than moving directly toward the anode as shown in Fig. 4(b)^[23]. The motion of the magnetic and electrical fields is almost cycloidal due to their combined action. Due to the virtual gate effect on the device surface^[32], it will exhaust the 2DEG to achieve overall electrical neutrality. In the magnetron sputtering chamber, electrons constantly collide with gas molecules and ionize them during their movement, which greatly improves the ionization efficiency of magnetron sputtering. High-energy electrons conduct kinetic energy to gas molecules or atoms during the collision, making TaN films prepared by magnetron sputtering have better adhesion and densification. Better densification can reduce the effect of virtual gate effect and prevent water vapor in the air from eroding and interfering with the surface of the device^[15].

Reliability, threshold stability, and current collapse suppression of GaN HEMT devices depend on a low-density interface condition. Examining the interface state of the two samples was possible by applying a C−V measurement at a frequency of 1 MHz. As shown in Fig. 5, each sample exhibits two ascending slopes. The electron transport from the AlGaN/GaN to the dielectric/AlGaN interface is represented by the second slope. The complete 2DEG depletion is shown by the first slope^[33]. The C−V slope at Sample A is slightly steeper than at Sample B, this may be expressed simply as the interface states of Sample A which are of higher quality than Sample B. To calculate the gate dielectric capacitance per unit area (C_ox) for each of the samples, we applied dielectric capacitance in series with the barrier capacitance model^[34]. The C_ox is 177.32 and 206.81 nF/cm² for Samples A and B, respectively.

The scan rate limits the accuracy of the C−V measurements, which can only provide a basic comparison between the two samples. For more precise interface state extraction, pulse-mode I_D−V_GS monitoring is utilized, as seen in Fig. 6^[17]. Fig. 6 (b) shows the interface charge (Q_it) distributions for both samples. Q_it is 2.43 × 10¹¹ cm⁻² for Sample A and 1.59 × 10¹² cm⁻² for Sample B when ∆E > 0.460 eV. Q_it is 3.64 × 10¹¹ and 9.4 × 10¹⁰ cm⁻² when ∆E > 0.657 eV, respectively. Q_it is the highest in Sample B when ∆E > 0.460 eV. The emission time of these types of interface traps is greater than 100 μs. In the backward scan of the V_gs, these traps are still occupied by electrons and cause Sample B to observe the largest V_th drift. For Sample B, the observable Q_it density is 12.26 × 10¹¹ cm⁻² at 0.460 eV < ∆E < 0.657 eV, which are regarded as shallow traps with short emission times. As for Sample A, the difference between Q_it at ∆E > 0.460 eV and Q_it at ∆E > 0.657 eV is small, which indicates that most of its interface traps are deep traps. In conclusion, Sample B has the highest trap density at the shallow interface and the lowest trap density at the deeper level between the two samples. Additionally, these computations show that compared to the TaN/AlGaN interface, traps are more likely to be filled at the shallow energy levels at the Al₂O₃/AlGaN interface. This provides an opportunity for electron hopping, which may help to explain why^[35]. As Fig. 1(b) illustrates, Sample B has the lowest I_on/I_off ratio and the largest gate leakage current of the two samples.

In summary, we performed an electrical characterization of the TaN/AlGaN/GaN HEMT, with an emphasis on gate leakage and current collapse. The high-resistance TaN film prepared by magnetron sputtering as the gate dielectric layer of the device achieved an effective reduction of electronic states at the TaN/AlGaN interface. In this device, a low current leakage of 2.15 × 10⁻⁷ mA/mm and a breakdown voltage of 1180 V are presented. Additionally, the MIS HEMT showed excellent operational stability during dynamic tests, even under 400 V of stress, the dynamic resistance was just 1.39 times. The current technology of using high-resistance TaN film as the gate dielectric layer of HEMT leads to excellent gate control and operational stability of AlGaN/GaN HEMT. This offers another avenue to achieve the high reliability of GaN MIS HEMT.