Microelectronics, Volume. 52, Issue 3, 383(2022)

Design of a Transient Enhanced Capacitor-Less LDO

SHEN Jie1,2, WANG Qian1, CHEN Houpeng1,3, NI Shenglan1,2, and SONG Zhitang1
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
  • show less

    To solve the problem of poor transient response of capacitive-less low dropout linear regulators (LDO), a capacitive-less LDO circuit with transient load change sensing was designed in a 40 nm CMOS process. Active feedforward frequency compensation was used to achieve circuit stability. The transient detection circuit sensed the load changes, and provided a charge or discharge path for the gate of the power transistor to weaken the output voltage fluctuation. The simulation results showed that the maximum overshoot and undershoot voltage of the LDO were 100 mV and 140 mV respectively, and the stable time was 1 μs when the load current changed from 0 to 100 mA. The transient performance was greatly improved within the full load current range.

    Tools

    Get Citation

    Copy Citation Text

    SHEN Jie, WANG Qian, CHEN Houpeng, NI Shenglan, SONG Zhitang. Design of a Transient Enhanced Capacitor-Less LDO[J]. Microelectronics, 2022, 52(3): 383

    Download Citation

    EndNote(RIS)BibTexPlain Text
    Save article for my favorites
    Paper Information

    Category:

    Received: Aug. 24, 2021

    Accepted: --

    Published Online: Jan. 18, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.210326

    Topics