Large-scale computational models have emerged as the core engine driving the development of emerging industries such as artificial intelligence, signal processing, and multimodal interaction. To support the rapid advancement of these high-performance computational models, there is an escalating demand for corresponding large-scale computing hardware platforms with enhanced performance capabilities.

However, as Moore’s Law approaches its physical limits and semiconductor fabrication processes enter the nanometer scale, various fundamental physical constraints have led to a gradual slowdown in the growth of computational power in traditional electronic chips. Additionally, the inherent bandwidth limitations and power consumption issues associated with electrical signal transmission hinder further large-scale expansion of traditional electronic computing architectures. Consequently, the search for higher-performance hardware substrates for computational models, along with overcoming the intrinsic limitations of conventional computing architectures, represents a critical technological challenge in the ongoing evolution of the information industry.

In contrast to traditional computing architectures that utilize electrical hardware for computation and signal transmission, integrated photonic platforms leverage optical signals for data processing and communication, offering significant advantages in terms of power efficiency, latency, and parallelism compared to their electronic counterparts. In recent years, the integration of photonic chips with electronic hardware to realize hybrid optoelectronic computing architectures has become a major research focus in both academia and industry. Within this transition from purely electronic to hybrid optoelectronic computing hardware, integrated photonic computing chips—which utilize light as the primary computational medium to perform large-scale computations directly in the optical domain—are considered a leading candidate for the next-generation computing paradigm. By exploiting the linear propagation properties and diverse nonlinear effects of light, integrated photonic computing platforms can implement various logical functionalities and construct high-performance computing architectures with exceptional throughput.

This review comprehensively discusses the key technologies underlying integrated optoelectronic computing chips, including linear matrix computation, nonlinear activation mechanisms, and computational model deployment methodologies, and while also surveying their current applications across different domains. Finally, we discuss the existing challenges and future development trends in integrated optoelectronic computing chips.

This article comprehensively reviews the research progress and challenges in integrated optoelectronic computing chips. First, this review begins by delineating the evolutionary trace from traditional electronic computing substrates to integrated optoelectronic computing chips (Fig. 1). Second, it discusses key technical pathways in integrated optical computing, including on-chip arrays for optical linear computation, nonlinear activators for analog optical signals, and hardware-aware training methodologies for computational model hardware deployment. Subsequently, it summarizes existing implementation approaches for on-chip optical linear computation arrays, such as coherent-architecture-based on-chip Mach-Zehnder interferometer (MZI) meshes, wavelength division multiplexing (WDM)-technology-based on-chip micro ring (MRR) arrays, and on-chip diffractive unit arrays (Figs. 2?4). For nonlinear activators, the review systematically analyzes two specific implementation strategies: optoelectronic hybrid nonlinear activators (Fig. 5) and all-optical nonlinear activators (Fig. 6). For hardware training methods targeting computational model deployment, the discussion categorizes them into three types (Fig. 7): offline weight decomposition, online backpropagation, and heuristic algorithms. Furthermore, this review conducts a detailed analysis of current developments in integrated optoelectronic computing chips across diverse application domains, covering their roles as hardware substrates for high-performance computing models (Fig. 8) and as novel signal processing modules in application-specific scenarios (Fig. 9). Finally, this review synthesizes all mentioned technical pathways (Fig. 10) and discusses prevailing challenges alongside future development trends in integrated optoelectronic computing chips.

Integrated optoelectronic computing chips leverage the intrinsic advantages of optical signals, including ultralow latency, minimal power consumption, and massive parallelism, to deliver unprecedented computational performance surpassing conventional electronic computing systems. This review provides a systematic examination of critical technological pathways in integrated optoelectronic computing. As an emerging computational paradigm, the underlying technologies encompass multidisciplinary domains spanning novel materials, advanced chip fabrication processes, innovative device architectures, and sophisticated algorithm-hardware co-optimization strategies. Driving progress in integrated optical computing necessitates comprehensive optimization across both hardware and algorithmic dimensions, particularly in scaling reconfigurable linear computing arrays, developing high-performance nonlinear activation modules, and implementing complex computational models directly in hardware. Moreover, advancing toward large-scale computational architectures also demands breakthroughs in co-packaging and interconnection schemes for optical/electronic modules, standardized interface protocols with modular designs, and efficient compilation/invocation methodologies for computational models. These synergistic advancements will facilitate the further combination of integrated optoelectronic computing chips with complementary optoelectronic transmission and control modules, ultimately establishing a robust computational ecosystem with diverse applications in AI acceleration, 6G communications, and quantum simulation systems.