In the application scenario of the resonant cavity stably controlled of the passive mode-locked picosecond seed source, aiming at the problem of fine-tuning output voltage control, a piezoelectric ceramic stack driving circuit system based on field programmable gate array（FPGA）is designed. The pulse counting method is used for the design of pulse width modulation（PWM）circuit, and a capacitance-resistance-diode（CRD）high-frequency filter is employed to protect the circuit by detecting the frequency of the PWM control signal. The flyback boost principle is used to drive the 12 V voltage up. Within a range of 20% to 50% duty cycle of the control signal, the output voltage ranges from 29.1 V to 118.74 V with an output voltage ripple within 0.66%. The system allows for a step adjustment of duty cycle by 0.02%, enabling precise adjustment of output voltage, providing a foundation for further precise control of piezoelectric stack displacement and thus controlling the resonant cavity of picosecond seed source, while also having reference value for other industrial piezoelectric driving devices.