INFRARED, Volume. 45, Issue 2, 28(2024)

Interface Circuit Design for Infrared Large Array Data Transmission

Fang-qing CHEN*
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    Infrared large-area array (2560×2048) digital readout circuits require high-speed, low-power consumption , and strong driving capabilities for chip data interfaces. Using 018 m complementary metal oxide semiconductor (CMOS) process, a 4∶1 parallel-to-serial conversion circuit, a level translation circuit, and a low voltage differential signal (LVDS) driver circuit using pre-emphasis technology were designed. The parallel-to-serial conversion circuit adopts a double-edge sampling tree structure to reduce clock frequency, the level translation circuit adopts a positive feedback structure to improve the speed, and the LVDS driving circuit uses a pre-emphasis secondary path with programmable current to compensate for high-frequency components in the main path, ensuring driving capability and improving the integrity of high-speed signals. The data transmission rate of the interface can reach 1 Gbit/s, and when the load capacitance is 2 pF, the power consumption of one channel is 158 mW@1 Gbit/s; When the load capacitance is 8 pF, with pre-emphasis turned on, the power consumption of one channel is 19 mW@1 Gbit/s, the output voltage swing is 350 mV, and the output common-mode level is 121 V. All parameters of the LVDS drive circuit meet the standard protocol.

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    CHEN Fang-qing. Interface Circuit Design for Infrared Large Array Data Transmission[J]. INFRARED, 2024, 45(2): 28

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    Paper Information

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    Received: Oct. 25, 2023

    Accepted: --

    Published Online: Jul. 26, 2024

    The Author Email: Fang-qing CHEN (875283368@qq.com)

    DOI:10.3969/j.issn.1672-8785.2024.02.004

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