A 12.5 Gbit/s high speed SerDes transmitter based on differential encoding technology was researched and designed. This circuit was mainly composed of a parallel-serial conversion module, a de-emphasis control module and a drive module. The driving module adopted a current mode logic XOR gate structure, and the addition of dynamic load could reduce the power consumption and achieve impedance matching with the transmission line. In order to ensure the original code output, a solution for adding a differential encoding circuit to the parallel-serial conversion module was proposed for the first time, so that the process of differential encoding and decoding with the data could be completed in the transmitter. The post simulation results showed that the data transmission speed of the transmitter reached 12.5 Gbit/s. Meanwhile, the overall power consumption of the transmitter was 39 mW, and the total output jitter was 0.05 UI, which was far less than the 0.3 UI required by the JESD204B standard.