We fabricated a silicon phototransistor having a polysilicon/silicon emitter structure. To evaluate the effect of the polysilicon/silicon interface on the performance of the phototransistor, we systematically studied the variations in DC current gain (h_FE) and emitter contact resistance (r_e) by comparing different surface pretreatment methods (routine RCA cleaning or RCA cleaning + HF dip) before the low-pressure chemical vapor deposition of polysilicon and subsequent thermal annealing at different temperatures after polysilicon preparation. Experimental results demonstrated that the additional HF dip caused the current-gain curve of the phototransistor to descend, whereas a high annealing temperature (900~1100 ℃) reduced the emitter resistance and allowed the characteristic parameters to be controlled well with minimal effects on the gain peak. This study provides valuable process references for optimizing interface engineering in phototransistors.