To avoid selecting an excessively large tuning gain K_vco causing degradation in the phase noise of phase-locked loop frequency synthesizers and various adverse effects from non-optimal sub-band selection, we propose a precise automatic frequency calibration (AFC) algorithm to achieve the accurate selection of voltage-controlled oscillator (VCO) frequency sub-bands. Furthermore, to further improve its noise performance, we propose a method for optimizing noise by adjusting the oscillation amplitude of a voltage-biased VCO, while avoiding excessive power consumption. A phase-locked loop frequency synthesizer is fabricated using SMIC 0.11 μm CMOS technology, with a VCO operating frequency range of 1.7–2.6 GHz. After division by four, the phase noise at a frequency deviation of 1 MHz from a local oscillator frequency of 433.92 MHz is −129.59 dBc/Hz. The total power consumption of the proposed frequency synthesizer is 4.8 mW, with an area of 0.32 mm².