Microelectronics, Volume. 52, Issue 2, 283(2022)

A High Linearity and Ultra-Bandwidth Sample/Hold Circuit

LIANG Hongyu1,2, WANG Yan2,3, and LI Ruzhang2,3
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
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    A high linearity and ultra-bandwidth sample/hold circuit with bridge shunt-series cascade structure. The sample/hold circuit included three units, such as input buffer, auxiliary switch and SEF switch. The improved auxiliary switch module unit with bridge shunt -series cascade structure greatly improved the linearity and bandwidth of the circuit. The sample/hold circuit was designed in a 0.13 μm SiGe bipolar process, and it was powered by -4.75 V and 2 V dual supply voltage. The simulation results showed that SFDR was 69.60 dB, THD was -65.25 dB, and -3 dB bandwidth was 35.43 GHz under the conditions of 100 fF sampling capacitance, 6.25 GHz sampling frequency and 10.28 GHz input frequency.

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    LIANG Hongyu, WANG Yan, LI Ruzhang. A High Linearity and Ultra-Bandwidth Sample/Hold Circuit[J]. Microelectronics, 2022, 52(2): 283

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    Paper Information

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    Received: Jul. 15, 2021

    Accepted: --

    Published Online: Jan. 16, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.210263

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