To solve the problem of poor output power and matching performance of traditional frequency triplier, a triplier was proposed while a filter was used as matching circuit based on TSMC 0.18μm CMOS process. This triplier had good matching performance and low power loss, and the output power of the third harmonic was improved. The static characteristics of the transistor were analyzed to further improve the output power. The measured results after the flow showed that the maximum output power was -6.2 dBm when the input power was 0 dBm, the fundamental wave suppression ratio was greater than 12.35 dBc, and the second harmonic suppression ratio was greater than 8.2 dBc within range of 31.5~36 GHz output frequency. The DC power consumption was 36.9 mW at 1.8 V power supply. The core circuit area was 0.35 mm2.