Microelectronics, Volume. 52, Issue 2, 253(2022)

A TI ADC Timing Mismatch Calibration Algorithm Based on Delay Filtering

LI Rui1, TANG He1, WU Jin2, GUO Xuan2, ZHOU Lei2, JI Eryou2, and PENG Xizhu1
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  • 1[in Chinese]
  • 2[in Chinese]
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    To solve the timing mismatch between time-interleaved ADC channels, a calibration algorithm based on delay filtering was proposed. This algorithm was a pure off-chip calibration algorithm. The delay deviation of each sub-channel was extracted by off-chip FFT analysis and refiting the ideal signal, then it calculated the corresponding FIR filter coefficient to compensate the delay deviation. The calibration algorithm solved the problem of insufficient precision of TI ADC caused by timing mismatch between sub-channels. The algorithm was applied to a 12 GS/s 12 bit ADC interleaving board. The results show that the mean increase of SFDR and ENOB was 31.356 4 dBc and 3.177 6 bit respectively.

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    LI Rui, TANG He, WU Jin, GUO Xuan, ZHOU Lei, JI Eryou, PENG Xizhu. A TI ADC Timing Mismatch Calibration Algorithm Based on Delay Filtering[J]. Microelectronics, 2022, 52(2): 253

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    Paper Information

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    Received: Feb. 17, 2022

    Accepted: --

    Published Online: Jan. 16, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.zjea022

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