The traditional multivalued reference voltage output buffers with different structures were compared and analyzed, and a novel one with low power consumption and easy compensation was proposed. The PMOS output structure and the low output impedance structure were used in the novel circuit to obtain both the higher output voltage swing and the faster transient response speed. The proposed circuit was simulated and verified in a 0.15 μm standard CMOS process with the Hspice. The simulation results showed that when the power supply voltage was 5 V and the temperature was 25℃, the output voltage upper limit could reach 4.82 V. When the value of the compensation capacitor was 3 pF, the phase margin was 86°. Under the conditions of 1.2 V input voltage, 4.5 V output voltage and 100 nA output current disturbance variation, the transient response time was 4 μs. The quiescent current was only 7 μA.