Microelectronics, Volume. 54, Issue 1, 156(2024)

A Side-Channel Analysis Method Against Bitstream Encryption of Virtex-7

LEI Wan1, LIU Dan1, WANG Lihui1, LI Qing1, and YU Jun1,2
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
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    With the wide application of FPGA in the fields such as commercial or national defense, the security of FPGA is facing great challenges and many attacks against FPGA have been proposed. In order to further research the security mechanism of the FPGA, this paper introduced a new Side-Channel Analysis (SCA) method and firstly studied the security vulnerabilities of bitstream encryption in the loading process of Xilinx Virtex-7 chips. Compared with previous targets, Virtex-7 chips have larger chip scale, lower signal-to-noise ratio, and are more difficult to be attacked. Previous studies always use SASEBO or SAKURA boards that are specially designed for SCA, while this study is the first to be carried out on Xilinx official evaluation board. The board does not consider the side-channel measurement acquisition case, so some manually modification is needed and then an adequate signal-to-noise ratio can be obtained. The Electro Magnetic (EM) radiation was took as the side-channel measurement, and each set key can be obtained within 800,000 EM traces. The adversary can obtain the bitstream plaintext by using the key, and then reverse the FPGA design or clone products, and so on. It will affect the security of FPGA.

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    LEI Wan, LIU Dan, WANG Lihui, LI Qing, YU Jun. A Side-Channel Analysis Method Against Bitstream Encryption of Virtex-7[J]. Microelectronics, 2024, 54(1): 156

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    Paper Information

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    Received: Jun. 9, 2023

    Accepted: --

    Published Online: Aug. 7, 2024

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.230233

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