Infrared Technology, Volume. 42, Issue 11, 1022(2020)

Verification Protocol for Improving Communication Stability Between FPGAs

[in Chinese]*, [in Chinese], and [in Chinese]
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  • [in Chinese]
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    As field-programmable gate arrays(FPGAs) become increasingly used in large-scale systems, it is often difficult for a single-chip FPGA to perform all the tasks required. High-speed and stable communication between multiple FPGAs has become a focus of research in this field. For this purpose, a verification protocol based on low-voltage differential signaling (LVDS) that can be used for high-speed and stable communication between FPGA chips was designed. This protocol performs multiple rounds of multipath verification based on conventional LVDS communication to improve transmission reliability. Based on this protocol, a nine-channel LVDS communication test system consisting of two Xilinx 7 series FPGAs was built. One channel was used to synchronize the clock, and the other eight channels were used for checksum communication. After a long period of high- and low-temperature tests, the bit error rate was greatly reduced compared with conventional LVDS communications while ensuring a single transmission rate of 1.2 Gb/s.


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    [in Chinese], [in Chinese], [in Chinese]. Verification Protocol for Improving Communication Stability Between FPGAs[J]. Infrared Technology, 2020, 42(11): 1022

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    Paper Information


    Received: Jul. 3, 2020

    Accepted: --

    Published Online: Jan. 11, 2021

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