A low phase noise and wideband frequency synthesizer was designed and implemented in a 0.18 μm SiGe BiCMOS process. The approaches and methods for optimizing the phase noise and widening the frequency band was analyzed for frequency synthesizer based on PLL type. A low output phase noise reference buffer and a high speed delta-sigma modulator were proposed., A conventional charge pump was improved to reduce ouput noise. A frequency divider based on ÷2/3 was used to implement a wideband working frequency. The measurement results showed that the phase noise floor of frequency synthesizer was -232.2 dBc/Hz, and the working frequency could cover 1~20 GHz.