Based on the architecture of a gigahertz continuous-detection logarithmic amplifier and the current-feedback fast-response technology, an ultra-wideband and fast-response logarithmic amplifier is designed, while the overall architecture and operating principle of the logarithmic amplifier are introduced. The circuit comprises a limiting amplifier, a rectifier, a bias circuit, an output stage, an offset compensation structure, and other units. The principle of ultra-wideband and fast-response design technology is analyzed, whereas the circuit design, layout design, and post-simulation are completed. The results of a chip flow test show that the logarithmic amplifier operates within 0.1–2.5 GHz at an operating voltage of 5 V. Under the ±3 dB requirement for logarithmic accuracy, the dynamic range can reach 70 dB, while the response time is ≤ 100 ns.