A high energy efficiency phase quantization A/D converter (PH ADC) based on successive approximation of load redistribution was designed. Aiming at the problem of low conversion accuracy caused by poor linearity of quantization level in traditional structure, the linearity of comparison level was improved by establishing phase mapping relationship and adopting linear regression curve technology. At the same time, the number of comparison levels was reduced to half of the traditional structure, which reduced the capacitor array area, power consumption and complexity of the circuit. Furthermore, a low power monotonic switching mode and a common-mode voltage lifting circuit were introduced to raise the weighted comparison level to the supply voltage, avoiding the design of additional reference level generating circuits. The circuit simulation results based on 55 nm CMOS process showed that the ENOB was more than 56 bit and the FOM value was 2438 fJ/conv under the whole process corner condition.