A high performance receiver is designed in HL55nm CMOS technology for the 5.8 GHz Doppler Radar Applications. The receiver is mainly composed of a transconductance low-noise amplifier (LNTA), a mixer, a local oscillation (LO) buffer, and a transimpedance amplifier (TIA). The receiver utilizes a transformer to convert a single-ended signal to a differential signal for excellent common mode noise suppression. LNTA employs noise cancellation to achieve low noise, while also featuring low power consumption, no inductance, and high output impedance. The receiver is put to sleep mode by using the duty cycle to achieve extremely low power consumption at the system level. The simulation results show that, the receiver achieves 41 dB gain and 27 dB noise figure at 50 Hz without LO leakage. The IP1dB of the receiver is −28 dBm. The proposed receiver has 4.75 mW and 23.76 μW power consumption in the normal mode and low power mode respectively. The test results show that the lowest NF of the receiver at 1 MHz is 26.7 dB, the highest gain is 41.6 dB, and the layout area is only 680 μm×384 μm.