GaN half-bridge output voltage is negative during deadtime, and it brings a challenge to the signal communication of gate drive circuit of GaN power device. A novel level shifter with false eliminating circuit and zero quiescent current was designed through studying the mutual effects between the state of the level shift latch circuit, half bridge output voltage jumping and its negative pressure in deadtime. The circuit was designed in a 100 V BCD 0.18 μm process, and the layout was post-simulated in a GaN half-bridge converter with input voltage of 100 V and switching frequency of 5 MHz. The simulation showed that the delay was 4.5 ns and 1.5 ns when the half-bridge output voltage was -3 V and 100 V, respectively.