Microelectronics, Volume. 54, Issue 2, 338(2024)
Automatic Fault Injection Analysis Method Against FPGA Bitstreams
Tampering with FPGA bitstreams and then running a cryptographic algorithm would result in ciphertext errors. This phenomenon can be used to theoretically analyze the secret key of a device. This analysis method often requires adversaries to fully understand the corresponding relationship between the internal structure of the target FPGA and the bitstream. However, reversing the bitstream is difficult and impractical. This study proposes an automatic fault injection analysis method against FPGA bitstreams. This method does not involve reversing engineering, and combined with the persistent fault analysis theory proposed by Zhang Fan et al., it considers the wrong output caused by tampering with algorithm constants, as an exploitable fault. An experiment on voltage fault injection by Spider on a Xilinx-7 series FPGA development board shows that the AES-128 bit key can be obtained within 480 wrong ciphertexts, and the data collection and analysis can be completed within 10 min.For easy encryption of the bitstream, the plaintext bitstream can be obtained using the electromagnetic side-channel analysis method. Subsequently, combined with the analysis method in this study, the AES key can be successfully broken.
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LEI Wan, LIU Dan, WANG Lihui, LI Qing, YU Jun. Automatic Fault Injection Analysis Method Against FPGA Bitstreams[J]. Microelectronics, 2024, 54(2): 338
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Received: Aug. 29, 2023
Accepted: --
Published Online: Aug. 21, 2024
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