A high performance sub-threshold CMOS voltage reference was designed in a 0.18 μm CMOS process. A voltage subtraction circuit working in the sub-threshold region was proposed, which adopted the gate-source voltage difference of two transistors with different threshold voltages as the voltage reference output. At the same time, the proposed voltage subtraction circuit could well eliminate the influence of the power supply voltage change on the output reference. The post-simulation results showed that the voltage reference designed in this paper had a linear sensitivity of 0.053%/V~0.121%/V in the supply voltage range of 0.55~1.8 V, the temperature coefficient was 9.5×10-6/℃~3.49×10-5/℃ in the temperature range of -20 ℃ ～80 ℃, the power supply rejection ratio was -65 dB@100 Hz, and the power consumption was 3.7 nW @tt, 0.55 V. The chip area was 0.008 2 mm2. The circuit was suitable for low power applications such as energy harvesting and wireless sensors.