In conclusion, this review summarizes recent innovations in isolated power converters, with key advances in transformer integration, rectifier design, chip-level EMI suppression, and feedback regulation techniques. These developments collectively drive improvements in efficiency, EMI performance, and the flexibility of feedback control, facilitating the realization of low-cost, high-efficiency, and low-EMI solutions for increasingly demanding applications. Looking ahead, isolated power converters are expected to further evolve toward high-voltage isolated converters^{[28, 29]}, multi-output capabilities^[27], and greater integration, enabling next-generation systems across energy, automotive, and communication fields.

To further reduce form factor and improve electrical performance, advanced packaging techniques have gained considerable interest. Fan-out wafer-level packaging (FOWLP), widely used in RF and memory chips, has emerged as a promising solution for transformer integration without separate transformer dies. In Refs. [12, 13], a transformer-in-package design based on FOWLP achieves 1.25 W output power and 46.5% peak efficiency in a compact 5 mm × 5 mm package, corresponding to a power density of 50 mW/mm². The transformer and interconnects are formed using low-loss redistribution layers (RDLs) on low-permittivity substrates (e.g., ε_r = 5.1 for glass), enabling high-Q coils and reducing substrate leakage. Representative on-chip and in-package transformer implementations are summarized in Fig. 1 to illustrate the current trends in technological evolution.

Isolated power converters have emerged as an active research topic in power integrated circuit (IC) design. Reflecting this growing interest, ISSCC 2025 has featured a dedicated session on "Isolated Power and Gate Drivers". These converters enable safe and reliable power delivery across voltage domains and are widely used in renewable energy, electric vehicles, and telecommunications. Galvanic isolation prevents surge currents and ground loop issues in harsh high-voltage environments. As demand grows for compact, efficient, and high–power-density solutions, fully integrated architectures featuring on-chip transformers are increasingly favored over traditional module-based designs, offering >5 kV isolation with a smaller footprint and lower system cost^[1].

Traditional PCB solutions for mitigating conducted EMI often involve adding EMI filters at the input^[22] and placing additional capacitors at the output. To address radiated EMI, stitching capacitors can be implemented using costly safety capacitors with sufficient voltage ratings^[23] or by utilizing inner layers of a multilayer PCB^[24]. However, these methods significantly increase both system cost and PCB area.

Feedback regulation techniques for isolated power converters. In many reported designs, digital isolators are used to transmit feedback signals from the RX to the TX for output voltage regulation. While effective, this approach increases overall system cost and design overhead.

EMI reduction techniques in isolated power converters. EMI suppression is essential in isolated power converters, as high-frequency switching complicates compliance with CISPR-32 and EN-55032 Class-B standards. As illustrated in Fig. 1, the inverter typically operates from tens to hundreds of MHz due to transformer size constraints and is modulated by a PWM signal at approximately 1 MHz for voltage regulation. This leads to conducted EMI (150 kHz–30 MHz) caused by discontinuous input current and output voltage ripple. Radiated EMI is induced by transient voltages across the isolation barrier, which generate common-mode current (I_CM) through the transformer’s parasitic capacitance. The resulting I_CM forms a dipole antenna between the ground planes, leading to radiation emissions in the 30 MHz–1 GHz range, as detailed in Ref. [10].

I_CM reduction can be achieved through symmetrical topologies, such as Class-D oscillators^{[9, 14]} and full-bridge LLC topologies^{[6, 7]}, which allow the converter to meet CISPR-32 Class-B EMI limits on a two-layer PCB without the need for frequency hopping. In Ref. [9], the use of a capacitor divider limits the gate–source voltage of the power transistors, resulting in elevated conduction losses. In Ref. [14], the topology encounters difficulty in sustaining oscillation and requires additional driver transistors, introducing extra switching losses. Moreover, variations in threshold voltage, C_gs/C_gd, and driver delays across process, voltage, and temperature (PVT) degrade symmetry in full-bridge LLC topologies, causing common-mode voltage (V_CM) fluctuations and a corresponding increase in I_CM. To address these limitations, Ref. [20] introduces complementary edge-aligned feedback and adaptive over-compensation techniques to stabilize the V_CM at the TX and RX sides, respectively. These methods enable the converter to meet CISPR-32 Class-B requirements on a two-layer PCB without stitching capacitors or external ferrite beads.

In Refs. [25, 26], voltage regulation is implemented entirely on the RX side without a feedback channel, by adjusting internal loading to stabilize the output voltage while the TX operates at fixed power. While this simplifies the architecture, it compromises overall efficiency under varying load conditions. Backscattering based on load-shift keying (LSK) is also widely adopted^{[18, 19]}. By controlling an LSK switch, the TX alternates between high and low power states, enabling output voltage modulation without additional feedback transformers or capacitors. In Ref. [27], a three-mode full-bridge rectifier—operating in normal, open, or short mode—is used to shift the TX oscillation frequency and modulate transmitted power. While these approaches eliminate the need for a dedicated feedback path, the additional LSK switch introduces power loss and reduces efficiency under light-load conditions, as the TX cannot be fully turned off. Ref. [21] further introduces an inherent backscattering mechanism for voltage regulation, based on the dual-LC-resonant topology. This approach removes the digital isolator entirely, significantly reducing silicon area and design complexity.

Low-cost EMI solutions at chip-level are highly desirable, as they eliminate the need for costly external techniques and simplify the EMI certification process. Ref. [5] employs a frequency hopping technique to suppress radiated EMI by dynamically varying the TX oscillation frequency. A 5-bit pseudorandom thermometer-code generator (PRTCG) is used to spread the emission spectrum, thereby reducing harmonic peaks and mitigating radiated EMI. With two external beads inserted between the system outputs and the secondary-side ground planes, the converter meets the CISPR-22 Class-B standard on a two-layer PCB without any stitching capacitors.

Ref. [11] presents a multi-core isolated power converter as an effective low-cost EMI solution at the chip level. By dividing the transformer into N smaller units and interleaving their operation, the design reduces conducted EMI and suppresses output voltage ripple. Radiated EMI is also mitigated through reduced parasitics and natural spectral spreading from slightly offset oscillation frequencies. The 4-core converter meets CISPR-32 Class-B conducted EMI limits without requiring external filters or spread-spectrum techniques, and passes radiated EMI certification on a two-layer PCB. Fig. 1 also summarizes representative chip-level techniques for mitigating conducted and radiated EMI, highlighting recent advancements in low-cost integrated solutions.

Beyond on-chip implementations, transformer-in-package designs have been explored to better balance integration and performance. By alleviating the thickness and width limitations of silicon-based windings, in-package transformers effectively lower coil losses. In Refs. [9, 10], a coreless transformer was implemented using 2-oz-thick, 200-μm-wide copper traces on two internal layers of a 4-layer package substrate, co-packaged with TX and RX chips in a land grid array (LGA). The thick, wide coils achieved a high-Q of 50.7, resulting in 51% peak efficiency and a power capacity of 1.2 W. Ref. [11] further introduced a 300 μm-thick Mn–Zn ferrite sheet as a magnetic core integrated into the substrate, with relative permeability of 100 at 100 MHz. Adding the magnetic core in this manner does not significantly increase fabrication cost relative to the design in Ref. [6], and it improves the k, while the enhancement in transformer Q is limited due to a decrease in self-resonant frequency. The converter reported a peak efficiency of 53.2% and 2 W output power.

Efficiency enhancement techniques for isolated power converters. Early designs^[1–5] investigated on-chip transformer integration using high-frequency (>100 MHz) LC-tank oscillators at the TX side to enable compact implementations. Among these, Ref. [5] introduced a coreless transformer with 6 μm-thick gold windings separated by 20 μm of polyimide, achieving >5 kV isolation. Due to the inherently low Q-factor (Q < 10) of on-chip micro-transformers on silicon substrates, these designs consistently reported peak efficiencies below 34%.

As illustrated in Fig. 1, an isolated converter typically consists of a transmitter (TX), a transformer, and a receiver (RX). The TX performs DC–AC conversion using an inverter, the RX performs AC–DC conversion through a rectifier, and output voltage regulation is achieved via feedback control, often implemented through a digital isolator. The first major challenge is that multi-stage power conversion reduces overall efficiency, primarily due to transformer and rectifier limitations. The second is that switching large currents at high frequencies generates significant EMI, making it difficult to comply with standards such as CISPR-32 and EN-55032 Class B. This mini review highlights recent advances and trends in isolated power converter technologies, focusing on efficiency improvement and EMI suppression.

To enhance transformer performance while preserving integration, specialized fabrication techniques targeting improved on-chip transformer Q have been proposed. In Refs. [6, 7], a solenoid transformer with a laminated magnetic core achieved a Q of 16 and an inductance of 130 nH. High-permeability and high-resistivity magnetic materials enabled strong coupling coefficient (k = 0.92) and reduced core loss. The transformer was fabricated using micro-plating and magnetic-core deposition, which increased process complexity and cost. The converter achieved 52% peak efficiency with 1.1 W output power. In Ref. [8], 100 μm-thick ultra-thick metal windings embedded in silicon were used to form a coreless transformer with a Q of 15.7 at 11 MHz. Despite the relatively high Q, the converter performance was affected by secondary-side losses and large resonant currents in the flyback topology, with 34% peak efficiency at 165 mW output.

Beyond transformer design, rectifier architecture further impacts the overall efficiency of isolated converters. While the TX-side inverter can achieve high efficiency using LC-tank oscillators or full-bridge LLC topologies, maintaining high efficiency at the RX-side rectifier remains challenging. Most existing designs adopt passive rectifiers based on Schottky diodes^[1–8] or MOS transistors^[9–14] due to their simplicity. Although MOS-based rectifiers reduce area, reverse current remains a major limitation to their efficiency. To address this, active rectifiers have been introduced^[15–20], though the requirement for gate drivers constrains the operating frequency and limits further miniaturization of the transformer. Ref. [21] proposes a dual-LC-resonant structure, replacing the RX full-bridge rectifier with a second LC tank oscillator. Thanks to the intrinsic advantages of LC tank oscillators, including no switching loss and a high gate–source voltage that reduces conduction loss, both the TX and RX sides achieve high efficiency. By defining the center-tap of the secondary coil as the output, the design achieves a distinct operating mode and reports a peak efficiency of 65.4%.