Microelectronics, Volume. 53, Issue 1, 102(2023)

A Phased Array Chip Amplitude and Phase Self-Calibration Algorithm and Circuit Implementation

YANG Zhe1, BAI Xuefei1, LI Xiao2, and DUAN Zongming2
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
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    Based on the phased array chip amplitude and phase calibration system, a self-calibration algorithm is proposed to improve beamforming quality. After calculating the error of each state, only by traversing the errors of all phased array chip states once, the target state could be screened out and a Look-Up-Table (LUT) could be generated. During screening, the amplitude error and phase error of a single target state and the RMS error of all target states calculated by Coordinate Rotation Digital Computer (CORDIC) were constrained. Then, the phased array chip could achieve 6-bit phase shift (360°) with error (RMS) less than 2° and 6-bit attenuation (32 dB) with error (RMS) less than 0.3 dB. Compared with the exhaustive search and successive approximation methods, the calibration scheme saves LUT generation time. According to the algorithm, a self-calibration chip is designed in a 65 nm CMOS technology with die area of 584 613.16 μm2.

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    YANG Zhe, BAI Xuefei, LI Xiao, DUAN Zongming. A Phased Array Chip Amplitude and Phase Self-Calibration Algorithm and Circuit Implementation[J]. Microelectronics, 2023, 53(1): 102

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    Paper Information

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    Received: Mar. 30, 2022

    Accepted: --

    Published Online: Dec. 15, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.220105

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