A linearization charge pump was designed in a 018 μm SiGe BiCMOS process, and the principle of this linearization charge pump was analyzed. By using a charging and discharging circuit based on sample-and-hold principle, and combined with a specific sequential logic circuit, the charge pump achieved the linearization and low fpfd spur of PLL. This linearization charge pump was applied to a PLL, and the measurement results of PLL showed that the phase noise @100 kHz offset frequency was improved by 9 dB compared with that of nonlinearity charge pump, and the fpfd spur was improved by 1205 dB compared with that of conventional linearization charge pump.