APPLIED LASER, Volume. 41, Issue 6, 1317(2021)
A Constant Fraction Discrimination Circuit with LVTTL Level Output
This paper introduces a constant fraction discrimination circuit with LVTTL level output. Through signal amplification, comparison and level conversion, the circuit is finally connected to FPGA chip, and the time measurement function is directly realized by delay chain in FPGA chip. The circuit adopts LVTTL level output, and the FPGA chip can directly identify the level. Compared with the traditional design, this design eliminates the special time measuring chip, saves the cost and takes into account the volume requirements. At the same time, the circuit is expected to solve the problems of high power consumption and low timing accuracy of lidar system.
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Xu Bin, Wang Li, Luo Haiyan, Ma Xingyue. A Constant Fraction Discrimination Circuit with LVTTL Level Output[J]. APPLIED LASER, 2021, 41(6): 1317
Received: Nov. 5, 2020
Accepted: --
Published Online: Feb. 17, 2022
The Author Email: Bin Xu (xbhero@126.com)