A radiation hardened 12T SRAM memory cell was presented. The stack structure composed of NMOS tubes was adopted to reduce power consumption, and the single event upset characteristic was used to reduce sensitive nodes, thus achieving good reliability and low power consumption. Hspice simulation results showed that the proposed memory cell could fully tolerate single node upset, and partially tolerate double node upset with a ratio of 33.33%. Compared with other ten memory cells, the area overhead of the proposed memory cell was increased by 3.90% on average, and the power consumption, read time and write time were reduced by 34.54%, 6.99% and 26.32% on average. The circuit had a large static noise margin with good stability.