Existing millimeter-wave radar target detection is mainly implemented based on serial processing platforms, which have certain limitations in processing speed for large-sized radar images. This paper proposes a fast millimeter-wave radar target detection structure based on a Field-Programmable Gate Array(FPGA), with a chain-type First-In-First-Out(FIFO) buffer at its core and incorporating an image extraction approach. The chain-type FIFO enables multi-frame data alignment and parallel output to obtain window edge data. Based on custom window parameters, the edge data are partitioned and summed, and then delayed and cached. This allows for the reuse of computational results before and after window movement, and in combination with a pipelined processing structure, it improves computational efficiency. By reasonably partitioning the overlapping regions of adjacent sub-images and extracting multiple small-sized sub-images from large-sized images for separate processing, the implementation speed of the radar target detection algorithm is significantly increased, and on-chip logic resources are substantially conserved. The proposed FPGA-based target detection method is validated using a Frequency-Modulated Continuous Wave(FMCW) millimeter-wave radar operating in the 92~94 GHz band. For a large-sized radar image of 1,000×2,000 pixels, a rapid processing time of 120 ms is achieved. The deployed FPGA algorithm consumes only thirty-two 18K BRAMs and 6 461 LUTs.