Infrared and Laser Engineering, Volume. 50, Issue 3, 20200252(2021)
Infrared image clarifying and FPGA implementation based on dark channel prior
Figures & Tables(11)
Table 1. [in Chinese]
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Parameter Value Minimum period/ns 5.307 Maximum frequency/MHz 188.43
Table 2. [in Chinese]
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Logic utilization Ref.[ 14 ]Ref.[ 15 ]Proposed hardware algorithm Slice LUTs 307 of 28800 (1%) 6119 of 39600 (15%) 2678 of 63400 (4%) Block RAMs 16 of 60 (26%) 40% 9 of 135 (6%) I/O cells 82 of 480 (17%) * 24 of 285 (8%) Slice registers 493 of 28800 (1%) * 2257 of 126800 (1%) Time period/ms 0.9057 0.3 0.1185
Table 3. [in Chinese]
View tableView in ArticleTable 3. [in Chinese]
Image 1 Image 2 e PSNR e PSNR Original infrared image 0 22.7104 0 22.6584 He algorithm with block effect 2.1031 20.8784 4.7996 20.3565 Wan algorithm 0.0412 22.5418 0.1318 22.4613 He algorithm after soft mapping 2.0449 21.0164 3.8656 20.4240 Proposed software algorithm 2.6203 22.3909 3.3664 22.6171 Proposed hardware algorithm 1.1272 22.1199 2.0592 22.4859
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Na Li, Jiaxian Deng, Yani Cui, Baodan Chen. Infrared image clarifying and FPGA implementation based on dark channel prior[J]. Infrared and Laser Engineering, 2021, 50(3): 20200252
Paper Information
Category: Infrared technology and application
Received: Nov. 9, 2020
Accepted: --
Published Online: Jul. 15, 2021
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