Fig. 1. The architecture of DFE

Fig. 2. Experimental setup of single wavelength 200 Gbit/s downlink optical access system

Fig. 3. DSP processing flow of PAM-4

Fig. 4. Experimental results with different lengths of channel equalizers

Fig. 5. Impact of different types of equalizers on the performance

Fig. 6. Impact of first-order kernel memory length on the performance

Fig. 7. Impact of second-order kernel memory length on the performance

Fig. 8. Impact of third-order kernel memory length on the performance