Fig. 1. Schematic diagrams of InAs/GaSb superlattice detectors：（a）conventional structure device，（b）gate-‍controlled structure device

Fig. 2. I-V curve of varying area devices with（a）no treatment without annealing，（b）N₂O treatment without annealing，（c）N₂O treatment with annealing，and（d）pixels with a diameter of 200μm for samples No.1，No.2，and No.3

Fig. 3. Relationship between R0A-1 and P/A of varying area device

Fig. 4. The leakage current on the sidewall surface of samples No. 1 and No. 3（the ordinate of the main graph is a linear coordinate，and the ordinate of the upper right graph is a logarithmic coordinate）

Fig. 5. I-V curves under different gate voltages（a）Sample No. 1，（b）Sample No. 3

Fig. 6. Simulation of side-wall leakage current under 0 gate voltage（a）Sample No. 1，（b）Sample No. 3（the ordinate of the main picture is logarithmic coordinates，and the ordinate of the lower left picture is linear coordinates）