In UAV 3D terrain mapping, the time-to-digital converter (TDC), which is the core module, needs to have long-range measurement capability and high measurement resolution. Based on the comprehensive consideration of the long range, kilometer-level ranging capability and centimeter-level measurement accuracy of the ranging system, a low power multi-phase clock generation circuit for TDC was designed in this paper. A pseudo-differential ring voltage controlled oscillator was used in this design. By optimizing the cross-coupling structure, the slope of the signal edges was improved, and the jitter performance of the clock and the suppression of power supply noise were enhanced while ensuring low power consumption. In the charge pump design, a very low bias current was selected by considering the loop bandwidth to further reduce power consumption while reducing the area of the loop filter. The multi-phase clock generation circuit was designed in SMIC 180 nm CMOS process. The simulation results show that the loop bandwidth is stable at 1 MHz at an output frequency of 400 MHz. The circuit achieves a fast locking speed at different process corners, with a phase noise of -88 dBc@1 MHz, a power consumption of 1 mW, and a root mean square jitter of 27 ps, meeting the accuracy requirements of centimeter-level ranging.