Infrared and Laser Engineering, Volume. 49, Issue 5, 20190553(2020)

A high speed programmable vision chip for real-time object detection

Li Honglong1...2,*, Yang Jie1,2,3, Zhang Zhongxing1,2, Luo Qian1,2, Yu Shuangming1,2, Liu Liyuan1,2, and Wu Nanjian1,24 |Show fewer author(s)
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    References(14)

    [1] [1] Sonka M, Václav Hlavác, Boyle R. Image Processing, Analysis Machine Vision[M]. New Yk: Cengage Learning, 2014.

    [2] [2] Ishikawa M, Ogawa K, Komuro T, et al. A CMOS vision chip with SIMD processing element array f 1 ms image processing[C]IEEE Int SolidState Circuits Conf, 1999: 206207.

    [5] [5] Shi C, Yang J, Han Y, et al. A 1000 fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array selfganizing map neural wk[C]2014 IEEE International SolidState Circuits Conference Digest of Technical Papers (ISSCC), 2014: 128129.

    [6] [6] Yamazaki T, Katayama H, Uehara S, et al. 4.9 A 1 ms highspeed vision chip with 3Dstacked 140GOPS columnparallel PEs f spatiotempal image processing[C]2017 IEEE International Solid State Circuits Conference (ISSCC), 2017: 8283.

    [8] [8] Krizhevsky A, Sutskever I, Hinton G E. Image classification with deep convolutional neural wks[C]Advances in Neural Infmation Processing Systems. 2012: 10971105.

    [10] T Chen, Z Du, N Sun. Diannao: A small-footprint high-throughput accelerator for ubiquitous machine-learning. ACM Sigplan Notices, 49, 269-284(2014).

    [11] [11] Liu D, Chen T, Liu S, et al. Pudiannao: A polyvalent machine learning accelerat[C]ACM SIGARCH Computer Architecture News. ACM, 2015, 43(1): 369381.

    [12] [12] Millet L, Chevobbe S, riamisaina C, et al. A 5500FPS 85GOPSW 3D stacked BSI vision chip based on parallel infocalplane acquisition processing[C]2018 IEEE Symposium on VLSI Circuits. IEEE, 2018: 245246.

    [13] [13] Chen Y, Krishna T, Emer J, et al. 14.5 Eyeriss: An energyefficient reconfigurable accelerat f deep convolutional neural wks[C]2016 IEEE International SolidState Circuits Conference (ISSCC). IEEE, 2016: 262263.

    [14] J Jo, S Cha, D Rho. DSIP: A scalable inference accelerator for convolutional neural networks. IEEE Journal of Solid-State Circuits, 53, 605-618(2017).

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    Li Honglong, Yang Jie, Zhang Zhongxing, Luo Qian, Yu Shuangming, Liu Liyuan, Wu Nanjian. A high speed programmable vision chip for real-time object detection[J]. Infrared and Laser Engineering, 2020, 49(5): 20190553

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    Paper Information

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    Received: Feb. 5, 2020

    Accepted: Mar. 25, 2020

    Published Online: Sep. 22, 2020

    The Author Email: Honglong Li (lihonglong@semi.ac.cn)

    DOI:10.3788/irla20190553

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