Fig. 1. Circuit architecture diagram

Fig. 2. Timing diagram of the circuit nodes

Fig. 3. (a) Passive quenching circuit structure; (b) Active-passive mixed quenching circuit structure

Fig. 4. Transient response of the mixed quenched SPAD

Fig. 5. (a) Equivalent circuit diagram of the quenching circuit with \begin{document}$ {R}_{{\mathrm{S}}} $\end{document} in passive quenching stage; (b) Circuit without \begin{document}$ {R}_{{\mathrm{S}}} $\end{document}

Fig. 6. Simulated dependence of the induction delay time on inductive resistance \begin{document}$ R\mathrm{_S} $\end{document} for different k

Fig. 7. Simulated dependence of the normalized delay improvement on inductive resistance \begin{document}$ R\mathrm{_S} $\end{document} for k=k₂

Fig. 8. Simulated dependence of the “cost performance” on inductive resistance \begin{document}$ R\mathrm{_S} $\end{document} for different k

Fig. 9. Quenching circuit structure

Fig. 10. (a) Layout of the proposed circuit; (b) Chip diagram of the detector and circuit connection

Fig. 11. (a) Measured resetting time of the proposed circuit; (b) Measured quenching time of the proposed circuit