Fig. 1. Block diagram of OSDL chip architecture with automatic calibration and control system

Fig. 2. Schematic diagram of optical power meter module

Fig. 3. Calibration and accuracy test results of multi-channel optical power meter module

Fig. 4. Voltage output stability test of multi-channel optical power meter module

Fig. 5. Schematic of communication interface

Fig. 6. Flow chart of driving voltage calibration for single optical switch

Fig. 7. Flow chart of multi-channel OSDL chip calibration and specified channel control

Fig. 8. Experimental setup of automatic calibration and control of OSDL chip

Fig. 9. Structure of 5-bit optical switching delay line

Fig. 10. Measured results of optical power and driving voltage of 6 optical switches in 5-bit OSDL chip calibration

Fig. 11. Measured transmission spectra of 5-bit OSDL in four different delay states

Fig. 12. Measured delay time of 5-bit OSDL chip calibrated by two systems