Fig. 1. Simplified diagram of the GDR and SEL system

Fig. 2. Schematic diagram of LLRF system framework

Fig. 3. Structures of the SEL and GDR control algorithm

Fig. 4. Layout of the 1.3 GHz cavity simulator

Fig. 5. Comparison of bode plots with different bit lengths of the 1.3 GHz continuous wave superconducting cavity digital model (blue line: continuous model; green line: 32 bit; red line: 48 bit)

Fig. 6. Hardware of the LLRF system and cavity simulator

Fig. 7. Diagram of address space and interfaces connection of MicroTCA.4 firmware^[23]

Fig. 8. Measured values and ideal values of the cavity field under the cavity simulator detuned at 50 Hz

Fig. 9. Amplitude and phase of the cavity field and the output of the LLRF controller in the locked SEL mode when the detuning frequency is 5 Hz