The target detection algorithm based on the convolutional neural network is developing rapidly， and with the increase in computational complexity， requirements for device performance and power consumption are increasing. To enable the target detection algorithm to be deployed on embedded devices， this study proposes a Yolo v3-SPP target detection system based on the ZYNQ platform by using a hardware and software co-design approach and hardware acceleration of the algorithm through FPGA. The system is deployed on the XCZU15EG chip， and the required power consumption， hardware resources， and performance of the system are analyzed. The network model to be deployed is first optimized and trained on the Pascal VOC 2007 dataset， and finally， the trained model is quantified and compiled using the Vitis AI tool to make it suitable for deployment on the ZYNQ platform. To select the best configuration scheme， the impact of each configuration on hardware resources and system performance is explored. The system power consumption （W）， detection speed （FPS）， mean value of average precision （mAP） for each category， output error， etc. are also analyzed. The experimental results show that the detection speed is 38.44 FPS and 177 FPS for Yolo V3-SPP and Yolo V3-Tiny network structures， respectively， with mAPs of 80.35% and 68.55%， on-chip power consumption of 21.583 W， and board power consumption of 23.02 W at 300 M clock frequency and input image size of （416，416）. This shows that the proposed target detection system meets the requirements of embedded devices for deploying neural network models with low power consumption， real-time， and high detection accuracy.