Fig. 1. System structure of adder topology solid-state modulator

Fig. 2. Equivalent circuit of adder topology solid-state modulator system

Fig. 3. Overall scheme of IGBT driving circuit

Fig. 4. Peripheral circuit of buck converter

Fig. 5. Gate drive circuit

Fig. 6. Protection circuit

Fig. 7. Schematic diagram for response testing

Fig. 8. Results of response testing

Fig. 9. Environment for driving IGBT capability testing

Fig. 10. Results of driving IGBT capability testing

Fig. 11. Desaturation protection test results

Fig. 12. Pulse waveform on load under different charging voltages