Journal of Atmospheric and Environmental Optics, Volume. 7, Issue 3, 220(2012)

Design of Driving Schedule of a Scientific Grade CCD Based on FPGA

Mei-na LU*... Jin HONG, Di-hu CHEN, Dong-gen LUO and Ya-dong HU |Show fewer author(s)
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    References(6)

    [1] [1] Kou Yumin, Sheng Hong, et al. Development status and application of CCD image sensors [J]. Video Engineering, 2008, 32(4): 38-42(in Chinese).

    [2] [2] CCD47-20 BI AIMO Datasheet: A1A-100041 Version 7 [M]. 2007(in Chinese).

    [3] [3] Jin Longxu, Li Guoning, Liu Yanyan. Design of driving circuit for frame transfer area CCD [J]. Optics and Precision Engineering, 2008, 16(6): 1141-1145.

    [4] [4] Chen Xuefei, Wen Desheng, Wang Hua. Designing on driving schedule generator for array CCD image sensor based on CPLD [J]. Chinese Journal of Electron Devices, 2007, 30(3): 883-885.

    [5] [5] Xia Yuwen. Introduction of Verilog HDL [M]. 3rd edition, Beijing: Beijing University of Aerionautics and Astronautics Press, 2008(in Chinese).

    [6] [6] Gu Yi, Ye Wei, Xu Yu. Design of driving schedule generator for area array CCD based on CPLD [J]. Optical Instruments, 2008, 30(6): 54-59(in Chinese).

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    LU Mei-na, HONG Jin, CHEN Di-hu, LUO Dong-gen, HU Ya-dong. Design of Driving Schedule of a Scientific Grade CCD Based on FPGA[J]. Journal of Atmospheric and Environmental Optics, 2012, 7(3): 220

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    Paper Information

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    Received: Feb. 20, 2012

    Accepted: --

    Published Online: May. 28, 2012

    The Author Email: Mei-na LU (meina@mail.ustc.edu.cn)

    DOI:10.3969/j.issn.1673-6141.2012.03.010

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