Optical Instruments, Volume. 42, Issue 4, 82(2020)
Design of timing generator for laser rangefinder
[4] [4] SUN Z L, LI N, WANG Y N, et al. High resolution programmable digital delay generat design realization[C]2010 International Conference on Intelligent System Design Engineering Application. Changsha, China: IEEE, 2010.
[6] [6] OKAYASU T, SUDA M, YAMAMOTO K, et al. 1.83 psresolution CMOS dynamic arbitrary timing generat f 4 GHz ATE applications[C]IEEE International Solid State Circuits Conference. San Francisco, USA: IEEE, 2006.
[7] [7] ARKIN B. Lowering the cost of test with a scalable ATE custom process timing IC containing 400 highlinearity timing verniers[C]IEEE International Conference on Test. Austin, USA: IEEE, 2005.
[8] CHEN Y Y, HUANG J L, KUO T. Design and implementation of an FPGA-based data/timing formatter[J]. Journal of Electronic Testing, 31, 549-559(2015).
[9] [9] CHEN Y Y, HUANG J L, KUO T. Implementation of programmable delay lines on offtheshelf FPGAs[C]2013 IEEE AUTOTESTCON. Schaumburg, IL: IEEE, 2013.
[10] [10] KEEZER D C, CHEN T H, GRAY C E, et al. Multigigahertz arbitrary timing generat data pattern serializerfmatter[C]2012 IEEE International Test Conference. Anaheim, USA: IEEE, 2012.
[11] [11] HUANG Y K, LI K T, HSIAO C L, et al. Design implementation of an EGpool based FPGA fmatter with temperature compensation[C]2017 IEEE 26th Asian Test Symposium. Taipei, China: IEEE, 2017.
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Haochen ZHAO, Chun XIONG, Pengcheng XIAO, Rongfu ZHANG. Design of timing generator for laser rangefinder[J]. Optical Instruments, 2020, 42(4): 82
Category: INSTRUMENTS
Received: Dec. 4, 2019
Accepted: --
Published Online: Jan. 6, 2021
The Author Email: ZHANG Rongfu (zrf@usst.edu.cn)