Optics and Precision Engineering, Volume. 23, Issue 11, 3270(2015)

Pipeline architectures of device-saving three dimensional DCT/IDCT algorithm

LIU Yuan-yuan1...2,*, CHEN He-xin1 and ZHAO Yan1 |Show fewer author(s)
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  • 1[in Chinese]
  • 2[in Chinese]
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    References(20)

    [1] [1] CONCEICAO R, SOUZA JC, JESKE R, et al.. Power efficient and high throughtput multi-size IDCT targeting UHD HEVC decoders[C].IEEE International Symposium on Circuits and Systems, Melboume, AUSTRALIA: ISCAS, 2014: 1925-1928.

    [2] [2] SUN H M, ZHOU D J, LIU P L, et al.. A low-cost VLSI architecture of multiple-size IDCT for H.265/HEVC[J].IEICE Transactions on Fundamentals of Electronics Communications and Computers Sciences, 2014, E97A(12): 2467-2476.

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    [5] [5] HUANG H, XIAO L Y, LIU J M.CORDIC-based unified architectures for computation of DCT/IDCT/DST/IDST [J].Circuits Systems and Signal Processing, 2014, 33(3): 799-814.

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    [7] [7] YANG Q ZH, LIU Y Q.Design of DCT of different lengths VLSI architecture for HEVC[J].Microelectronics, 2015, 45(1): 102-105. (in Chinese)

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    LIU Yuan-yuan, CHEN He-xin, ZHAO Yan. Pipeline architectures of device-saving three dimensional DCT/IDCT algorithm[J]. Optics and Precision Engineering, 2015, 23(11): 3270

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    Paper Information

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    Received: Sep. 1, 2015

    Accepted: --

    Published Online: Jan. 25, 2016

    The Author Email: Yuan-yuan LIU (yuanyuan10@mails.jlu.edu.cn)

    DOI:10.3788/ope.20152311.3270

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