In on-chip communication, the size differences between single-mode fibers and on-chip optical waveguides will cause a mode mismatch. Due to the grating diffraction, the grating coupler can avoid the above problems, and thus it has become an ideal device for connecting the external light source with the on-chip photon device. Traditional grating couplers generally employ a tilt angle of 8°–12° to avoid second-order reflection, but the fiber has to be adjusted and polished before the silicon photonic integrated chip is tested and packaged, which results in high testing and packaging costs and is not conducive to fast wafer level testing and low-cost photon packaging. With the fiber grating placed vertically, the light emitted by the light source is vertically incident on the grating, whose advantages are as follows: it is unnecessary for tilting the fiber top and adjusting the angle, with reduced fiber alignment difficulty, applicability for more intensive integration, and more cost-effectiveness than traditional grating couplers. We design a double-layer Si₃N₄ antireflection vertical grating coupler structure that can be employed in wavelength division multiplexing technology. This vertical grating coupler shows excellent characteristics of low loss and broad bandwidth, and the feasibility of processing and application of the device is proven by analysis. Our results can provide ideas for vertical coupling applications and low-cost optical fiber packaging of silicon photonic integrated chips.

A double-layer Si₃N₄ antireflection vertical grating coupler is designed. First, the model is built based on the finite difference time domain method, and the three initial structural parameters of the grating (grating period, duty cycle, and etching depth) are optimized by particle swarm optimization to obtain the maximum coupling efficiency. After obtaining the optimal parameters, the appropriate grating period, duty cycle, and etching depth are analyzed and selected according to the practical application requirements. Then, the Al film is deposited on the silicon substrate to act as a metal reflector to prevent substrate leakage. After that, the upper reflectivity is reduced by growing double-layer Si₃N₄ films on the top of the uniform grating region. The effects of four structural parameters of double-layer Si₃N₄ films on efficiency are studied, including the height H₁ between the lower Si₃N₄ and the grating, the thickness D₁ of the lower Si₃N₄, the gap H₂ between the upper and lower Si₃N₄, and the thickness D₂ of the upper Si₃N₄. Next, the coupling efficiency and upper reflectivity of the optimized double-layer Si₃N₄ antireflection grating coupler are analyzed. Additionally, the bandwidth performance of the vertical grating coupler is also simulated and analyzed.

By comparing the cross-sectional light field distribution of double-layer Si₃N₄ antireflection vertical grating coupler before and after structure optimization (Fig. 10), the effects of different measures on coupling efficiency and upper reflectivity are analyzed (Table 1). Results indicate that the utilization of Al reflector and double-layer Si₃N₄ antireflection films can improve the coupling efficiency by 37.6 percentage points, and the upper reflectivity does not exceed 4.4%. Meanwhile, the optimized double-layer Si₃N₄ antireflection vertical grating coupler has high coupling efficiency. Additionally, the machining process during the period is introduced, and the error tolerance during the process is analyzed (Fig. 12). Finally, by changing the period and the width of each etching slot to form an apodization grating, a new unidirectional vertical grating coupler structure is formed. A slit structure is added at the back of the reflection grating to act as a reflector, and the device also has high vertical coupling efficiency.

We design a double-layer Si₃N₄ antireflection vertical grating coupler structure which can be adopted in wavelength division multiplexing technology. The analysis results show that the incident light with a wavelength of 1550 nm in transverse electric (TE) mode can achieve more than 94% vertical coupling efficiency (56.4% before the introduction of Al reflector and double-layer Si₃N₄ structure), and the 3 dB bandwidth is 107 nm (1485–1592 nm), with good characteristics of low loss and bandwidth. The machining process of the device is introduced in detail, and the error tolerance during the process is analyzed. It is proven that the device has better alignment tolerance, reducing the machining difficulty and facilitating wafer-level testing. Based on this design, a new unidirectional coupling structure is also discussed by adding apodization grating and slit structure, and the new structure can obtain a coupling efficiency of over 71%. This design provides an efficient and cost-effective solution for low-cost optical packaging of vertically coupled applications and silicon photonic integrated chips.