Acta Photonica Sinica, Volume. 41, Issue 3, 364(2012)

Design of a Large Array CMOS Image and Display System in Real-time Synchronization

SU Wan-xin*
Author Affiliations
  • [in Chinese]
  • show less
    References(8)

    [1] [1] GAO Yang, LIU Rong-ke, HU Wei. Design and implementation of high definition video image system based on FPGA+DSP[J]. Electronic Measurement Technology, 2011, 34(1): 69-73.

    [4] [4] CHEN Shu-dan, WEN De-sheng, YAND Wen-cai. Design and implementation of driving circuit for high frame rate CMOS camera based on CPLD[J]. Electronic Design Engineering, 2008, 11: 9-11.

    [6] [6] YANG Lu, SU Xiu-qin, XIANG Jing-bo. Design of video image processing system based on DSP and FPGA[J] . Control & Automation, 2008, 24(21): 288-289.

    [8] [8] Micron.Mt9m413c36stc Handbook[M]. Micron,Ver. 3.0 1/2004 EN.

    Tools

    Get Citation

    Copy Citation Text

    SU Wan-xin. Design of a Large Array CMOS Image and Display System in Real-time Synchronization[J]. Acta Photonica Sinica, 2012, 41(3): 364

    Download Citation

    EndNote(RIS)BibTexPlain Text
    Save article for my favorites
    Paper Information

    Received: Aug. 1, 2011

    Accepted: --

    Published Online: Mar. 30, 2012

    The Author Email: Wan-xin SU (ccswx@163.com)

    DOI:10.3788/gzxb20124103.0364

    Topics