A low-density Field Programmble Gate Array(FPGA) was chosen to realize a high-accuracy, low nonlinearity Time-to-Digital Converter(TDC) circuit to a laser range finder,for the high-density FPGA TDC circuit showed a worst linearity. The high-speed counter, interpolator methods and the encoder algorithm were studied, and the factors effecting on the high-resolution and nonlinearity of TDC circuit implemented in a single FPGA were analyzed.Then, a method to reduce the nonlinearity of TDC circuit was proposed. Focusing on the method, a high-speed latch problem was settled based on the above factors, and a TDC circuit was designed by a low-density FPGA XC2V250. A USB interface was used to transfer the time signal into the digital code to a PC to be calculated and displayed. Finally, a time measurement circuit was designed to measure the delay time of TDC delay cells. Obtained delay time was processed and analyzed,and experimental results indicate that the single plot precision of the TDC circuit is about 80 ps, and the time interval resolution after calibration can reach 40 ps. The differential nonlinearity and integral nonlinearity of TDC circuit are between -0.524LSB and +0.448LSB,-1.598LSB and +1.492LSB,respectively.