Fig. 1. Main control interface extended logic FPGA external interface

Fig. 2. Main control interface expansion logic FPGA operating environment diagram

Fig. 3. System overall functional block diagram

Fig. 4. System overall functional block diagram

Fig. 5. Schematic diagram of driving waveform and current

Fig. 6. Internal unit structure diagram of the focusing motor module

Fig. 7. Second pulse interface timing diagram

Fig. 8. Schematic diagram of time code correction and punctuality

Fig. 9. Time code calibration and punctuality process

Fig. 10. Motor torque frequency characteristic curve

Fig. 11. Focus motor acceleration section

Fig. 12. Focus motor adjustment time

Fig. 13. Focus motor deceleration section

Fig. 14. Constant speed section of focusing motor