Visual perception is a critical function of the eye that senses light stimuli and contributes to the acquisition of external information in the daily lives of humans in a significant way. (1) At least 80% of the information about our surroundings are obtained through vision. (2) Inspired by biological vision, the construction of artificial visual neural networks will be of great importance. (3,4) The biomimetic optoelectronic synaptic devices are the basis for developing artificial visual neural networks owing to their ability to integrate the functions of detection, processing and retaining memory of the external light stimulus. (5−7)

Various types of optoelectronic synaptic devices have been reported. Most of them have primarily been focused on tri/multiterminal transistors and two-terminal resistance switching memories. (8−13) Among these, transistor based devices have the advantage of higher integration and can also employ gates to modulate synaptic behavior to achieve signal amplification in bionic vision. (12) Transistor devices facilitating/suppressing the separation/binding of photogenerated electron–hole pairs are one of the necessary conditions for realizing biomimetic synapses. (14−16) To achieve high photoelectric conversion and long-lasting photoconductivity, various methods have been explored. Tuning the device structure design, modulation of the molecular structure of the active layer, and variation of the dielectric layer interface are some commonly applied techniques. (11,17) Among all these approaches, modification of the dielectric layer interface is a simple and effective strategy for improving photoconversion performance. (18,19) A reversible charge trapping phenomenon was simulated by Zhong et al. through the introduction of a poly(2-vinylnaphthalene) electret layer, which exhibited various synaptic behaviors at primary, young and mature stages. (18) Polyacrylonitrile (PAN) films were used as the dielectric layer for fabrication of organic field effect transistors (OFET) in another study carried out by Dai et al. Enhancement of the charge trapping effect that enabled the devices to exhibit excellent synapse-like behavior was attributed to the presence of polar groups in the PAN films. (20) Zhu et al. prepared p-fluorinated polystyrene (p-FPS) for dielectric layers in OFET devices by side-chain engineering. (19) The introduction of p-FPS was shown to increase the trap density, resulting in efficient photonic memory and excellent artificial synaptic properties. These studies suggest that the carrier transport interface charge trapping effect of the OFET is a promising option. Self-assembled monolayers (SAMs) treatment of dielectric layers in OFET have been actively studied in the early history of organic electronics, but the systematic study of its effect on the synaptic devices has been rare. (21,22)

Film morphology of the semiconductors was studied using AFM. As shown in Figure S4a–d, the PTDPPSe-4Si films deposited on different SAMs were dense nanofibers that exhibited reduced surface roughness compared to the Bare/PTDPPSe-4Si films. This may also contribute to improved electrical performance. These results were also consistent with the results obtained from SEM characterization, which are presented in Figure S5a–d.

The charge trapping effect at the carrier transport interface has a significant impact on the optoelectronic performance of the device. (23) In this study, the optoelectronic performance of SAMs/PTDPPSe-4Si devices was systematically been investigated. A wavelength of 808 nm in the NIR region of the UV–vis absorption spectrum was used as the external stimulus. First, the transfer characteristic curves for each device in the dark and under light irradiation (17.5 mW cm^–2) were obtained, which are provided in Figure 2a-d. It was found that all of the transfer curves exhibited a significant positive shift under NIR illumination, which corresponded to the large hysteresis in the results obtained from the electrical performance characterization. This can be attributed to the presence of a large number of charge traps at the carrier transport interface in each device. (28) The variation in ΔV_th was used to estimate the number of captured photogenerated carriers at the dielectric/active layer interface, and ΔV_th is the change in threshold voltage extracted from the device transfer curve before and after light stimulation, see Supporting Information for details. (26) The ΔN_trap represents the number of traps with carriers captured at the dielectric-active layer interface. which was calculated using the following mathematical relationship: where e represents the fundamental charge and C represents capacitance of the dielectric layer. As shown in Figure 2e  and Table S1, the interface of the OTS/PTDPPSe-4Si device exhibited the lowest number of trapped photogenerated carriers in comparison to the other three devices. This indicated that the surface trap passivation of OTS-modified SiO₂ was relatively better, which facilitated the charge transport mechanism in the dark state. (22) In contrast, the FPPTS/PTDPPSe-4Si device exhibited the largest ΔN_trap, indicating that the carrier transport interface of this device displayed a higher, more efficient charge capture capability. In order to verify whether the UV ozone treatment on the SAM surface affects the electron trapping of the direct spin-coated devices, control experiments were done. The devices were prepared by direct spin-coating PTDPPSe-4Si on Si/SiO₂/OTS substrate without UV ozone treatment. The transfer curves were compared between dark and light conditions (Figure S6a,b). According to eq 1, the number of traps to capture photocarriers is about 1.43 × 10¹², which is similar compared with the number of traps after UV-ozone treatment (1.49 × 10¹²). It indicates that the effect of UV ozone treatment is negligible. The responsivity (R), photosensitivity (P), and detectivity (D*) of the SAMs/PTDPPSe-4Si devices were further evaluated quantitatively. (29,30) The value of R was calculated using the following mathematical expression: where I_dark is the current obtained under dark conditions, I_light is the current value under illumination, and S is the effective area irradiated by light (1 × 10^–3 cm²). Light intensity i_p was 17.5 mW cm^–2. The photosensitivity (P) is one of the most important parameters required to calculate the light sensitivity of the device, (30) and it is defined by the following expression:

The D* value for the shot-noise-limited case provides a measure of the smallest signal that can be detected by the device and is calculated using

After calculation of these parameters using the above equations, it was clear that the devices based on the OTS/PTDPPSe-4Si and FPPTS/PTDPPSe-4Si exhibited high R, P and D* values (Figures 2f, S7a,b, and Table S1). The value of R exceeded 0.2 A W^1–, and the value for P was found to be up to 10⁵, whereas the value of D* was calculated to be higher than 10¹¹ Jones. The high detection performance of FPPTS/PTDPPSe-4Si devices can be attributed to the presence of a high number of charge traps at the carrier transport interface. (19) Although the number of carrier traps in the OTS/PTDPPSe-4Si device was low, the higher carrier mobility allowed the photogenerated holes to reach the electrode at a faster rate before recombination, which reduced the complexation of the electron–hole pairs, resulting in better photodetection performance. The more specific reasons are verified and explained later.

The transient optical response of the SAMs/PTDPPSe-4Si and Bare/PTDPPSe-4Si devices was further compared. As shown in Figures 2g and S8a-c, the channel current in each device rose significantly under illumination of the NIR light source with an intensity of 17.5 mW cm^–2 for about 8 s. In order to obtain a stable I_D-Time test curve output at a lower energy consumption, we chose the test conditions of V_G = −5 V and V_D = −5 V. ΔI_D is the value after normalization and represents the current increase under a light pulse. Upon removal of the light source, the photocurrent gradually decayed down. Among the different types of devices, the FPPTS/PTDPPSe-4Si based device exhibited the highest instantaneous photocurrent (Figure 2h), which was due to the fact that FPPTS/PTDPPSe-4Si devices contained a higher number of carrier traps with a good separation between each electron–hole pair, thereby increasing the number of majority carriers present in the channel. To compare photocurrent decay of the different devices, the decay was curve fit using a double exponential equation: where I₀ represents the photocurrent before illumination removal, A₁ and A₂ are constants, and τ₁ and τ₂ are the fast and slow decay time constants, respectively. (31) The decay time constant τ₁ is usually associated with the fast recombination of photogenerated carriers through shallow traps or between band gaps, while τ₂ is associated with the slow release of photogenerated carriers trapped within deep trap states. (27) On the contrary, when fitting the photocurrent increase process using the double exponential function, τ₁ and τ₂ represent the fast increase and slow increase processes, respectively. As shown in Figure S8a, τ₁ and τ₂ for photocurrent increase are 0.57 and 3.19 s, respectively, which indicates that the photoresponse current exhibits a rapid increase followed by a slow increase process. Since the photocurrent decay is crucial for the study of the interfacial trap state, the subsequent fitting comparison is done only for the photocurrent decay process. The obtained fitting curves are shown using light gray dashed lines in Figure 2g, Figure S8a-c. The results revealed that the FPPTS/PTDPPSe-4Si device exhibited the highest values for τ₁ and τ₂ (Figure 2i), which indicated that the electron capture mechanism at the carrier transport interface in this device could moreover be attributed to the deep traps, making it difficult for the captured electrons to recombine. In contrast, the Bare/PTDPPSe-4Si and PETS/PTDPPSe-4Si devices exhibited lower values of τ₁ and τ₂, indicating that these devices were dominated by the shallow trap capture mechanism, which allowed for the rapid recombination of the captured electrons.

The results of the experimental studies described above showed that the presence of a trap at the carrier transport interface plays an important role in the optoelectronic performance of the device. The traps may have formed due to defects at the dielectric layer interface or in the active layer itself. Control experiments were added and performed to confirm this hypothesis. The predeposited PTDPPSe-4Si films were transferred to different SAMs substrates as well as Bare substrates, and then transistor devices were fabricated (Figure S9). Details of the preparation process are provided in the Experimental Section. The transfer and output characteristic curves for the devices are presented in Figure S10a–h, respectively. It can be seen from the figures that the hysteresis for the devices fabricated in this work was reduced significantly in comparison to the direct spin-coated devices (Figure S2a–d), which indicated that the number of carrier transport traps at the interface was reduced for these devices. (25) The average mobilities of Bare, PETS, FPPTS and OTS-based devices were calculated to be 0.28 cm²V^–1s^–1, 0.40 cm²V^–1s^–1, 0.39 cm²V^–1s^–1 and 0.56 cm²V^–1s^–1, respectively. The switching ratios for all devices exceeded the value of 10⁴, as shown in Figure S11a,b. A significant improvement in mobility was achieved in comparison with that obtained from direct deposition of layers in semiconductor devices. The top and bottom surface morphology of the transferred film were characterized separately (Figures 3a,b and S12a,b). It was revealed that the top and bottom surfaces have different morphology. The improvement in the electrical properties may be caused by differences in the way the conjugated polymer molecules are stacked on the upper and lower surfaces of the deposited films. Compared to the contact between the semiconductor film and the substrate interface, at the air interface, the semiconductor molecules move with a small bundle, allowing for better molecular stacking when the solvent evaporates, and facilitating carrier transport. (32) As a result, the electrical performance of the device is improved when the upper surface of the transfer-spin-coated deposited film is in contact with the substrate. The difference in the performance of devices c_orresponding to different semiconductor thin film preparation processes suggests that the carrier trappings partly come from the semiconductor layer.

To investigate the effect of SAMs on the optoelectronic performance of the devices, the transfer characteristic curves of the transferred thin film devices were obtained in the dark and under light conditions, which are shown in Figure S13a–d. The value of ΔN_trap was calculated using eq 1. From Figure S13e and Table 2, it can be clearly seen that the FPPTS/PTDPPSe-4Si based device exhibited the highest value of ΔN_trap, which is primarily attributed to the strong electron-absorbing property of the -F group in FPPTS. The values of R, P, and D* were calculated using eqs 2–4, respectively. The plots for the variation in these parameters with change in the gate voltage V_G are shown in Figure S13f-h and Table 2. The highest values for the R, P, and D* parameters were obtained for the FPPTS/PTDPPSe-4Si based device. This is due to the fact that the FPPTS-modified interface contained a higher number of trapped carriers compared to the other three interfaces. (19) This proved that different modified layers at the dielectric layer interface also have a significant impact on the interfacial carrier trapping effect.

To further verify the above results, the I_D–Time response curves were also obtained, as shown in Figure S14a-d. It was revealed that the transient light response currents of the devices based on transferred films all enhanced substantially in comparison to the thin film devices fabricated by using direct spin-coating deposition (Figures S14e and 2h), which is a direct result of the improved electrical performance of the devices. Fitting the decay curve using a double exponential function revealed that the maximum value of τ₂ never exceeded 31 s, which is less than half of what was obtained from the directly spin-coated film, as can clearly be seen from a comparison of Figures S14f and 2i. This further confirmed that the presence of defects within the semiconductor was responsible for the interfacial charge trapping mechanism. Despite the high response of the transfer-deposited FPPTS/PTDPPSe-4Si devices, the short decay time of the current is not favorable for the simulation of biomimetic visual long-term memory.

The above control experiments shed more light on the optical response mechanism, clarifying it further, as shown by the results provided in Figure 3c,d. Owing to the narrow bandgap of the PTDPPSe-4Si polymer, the electron–hole generation process took place inside the semiconductor under NIR light irradiation and separation by internal electric field. (33,34) Since traps were present inside both SAMs and semiconductors, the separated electrons were partially confined within trap states of the SAM layer (Figure 3c) and partially trapped by internal traps present within the semiconductor (Figure 3d). This eventually led to an increase in the number of holes and generated a current in response to light illumination. As the light source was removed, the trapped electrons were gradually released and recombined with the holes, resulting in a slow decay of the photocurrent.

In biological synapses, when a presynaptic neuron receives an external stimulus, a signal is transmitted to the synaptic vesicle, followed by the release of neurotransmitters to the postsynaptic membrane, where the transmitter binds to receptors located in the posterior membrane, triggering a change in potential to transmit the message, as shown in Figure 4a. (35) The transistor devices prepared in this work simulate a similar kind of biological synaptic behavior. The interfacial traps of the device can be used to simulate the receptors in the biological postsynaptic membrane, the NIR light may be considered as the external stimulus, whereas the positive photocurrent signal can be taken as the excitatory postsynaptic current (EPSC). (5) The FPPTS/PTDPPSe-4Si device exhibits the highest charge-trap density and slow photocurrent decay process, which allows for long-term retention of information, an important property required to enable the simulation of bionic memory functions. Therefore, the device was chosen to simulate various bionic synaptic behaviors. As shown in Figure 4b, the EPSC of the device increased when stimulated by an NIR light source with an intensity of 17.5 mW cm^–2 for 2 s. The current slowly decayed as the light source was removed, similar to the case for biological synaptic signals. Synaptic plasticity is a property of tunable connections between nerve cells, which is categorized into two main categories, namely short-term plasticity (STP) and long-term plasticity (LTP). (36) Paired pulse facilitation (PPF) is one of the most important properties of STP. (37) It can clearly be seen in Figure 4c that as two light pulses were applied consecutively one after the other, the change in EPSC after the second light pulse was greater than the change in EPSC after the first light pulse. This can be explained by the fact that increase in the EPSC brought upon by the first light pulse had not yet fully decayed to the initial state at the time when the second light pulse was applied. (38) The PPF ratio was further calculated and assessed by varying the time between the two pulses (ΔT). Here, the PPF ratio is defined by the following mathematical expression: where A₁ and A₂ are the EPSC values added for the first and second optical pulses, respectively. (39) As ΔT was gradually increased, the PPF exhibited a decrease in its value, as shown in Figure 4d. This implied that the device had STP characteristics.

Synaptic plasticity plays an vital role in reception of information and learning by living organisms. (3) In this work, the prepared devices also exhibited plasticity in relation to light intensity, light pulse duration, and the number of light pulses. As the light intensity was increased from 0.522 mW cm^–2 to 17.5 mW cm^–2, the EPSC level also increased from 0.66 nA to 5.89 nA, as shown in Figure 4e. Similar phenomena occurred as the light pulse time and the number of light pulses were raised, as shown in Figures S15 and 4f, respectively. This phenomenon may be attributed to enhancement of the light intensity, light pulse duration, and the number of light pulses, all of which increased the number of captured electrons in the carrier transport interfacial layer, thus leading to an increase in the EPSC. (20) The synaptic plasticity enhancement or facilitation effect was also a manifestation of the increased synaptic weight (ΔG). (40) Here, the channel conductance of the device was used to simulate the parameter of ΔG, which can be defined as the ratio of EPSC to the drain voltage. (41) It was found that ΔG increased with an increase in the light intensity (Figure S16a), light pulse duration (Figure 4g), and the number of light pulses (Figure S16b).

The memory of an organism can be categorized into short-term memory (STM) and long-term memory (LTM) based on duration of the memory. (42) The change in ΔG can be used to imitate the memory level of an organism. As shown in Figure 4h, the memory level increased gradually with an increase in the light stimulation time, thus successfully simulating the transition from STM to LTM. A similar memory effect was observed with the intensity of the light pulses (Figure S17) and the number of light pulses were increased, as shown in Figure 4i. Hence, biological synaptic plasticity as well as memory behavior were successfully simulated.

Recognition and memory of images is an important manifestation of visual learning. (42) In this study, the learning and forgetting process of bionic vision was demonstrated using the image. As shown in Figure 5a, increasing the number of learning times from 1 to 5 led to a significant darkening of the image color, which simulated the learning process of bionic vision. At the end of the study, the memory of the images gradually diminished with time. This was quite similar to the learning as well as the forgetting behavior associated with biological vision.

To simulate the recognition of letter images by bionic vision, we constructed a 5 × 7 array of synapses and used a computer system to build a convolutional neural network (CNN), as shown in Figure 5b. The CNN algorithm was implemented using the Python language. See the Support Information for Python language source code. It consisted of a convolutional layer and a fully connected layer. (43) The fully connected layer included input, hidden, and output neuron layers. In the convolution process of feature extraction, four feature maps were obtained from the input pattern image with a size of 5 × 7. Thereafter, 32 feature signals from the flattening layer were passed on to the fully connected network for classification. The phototransistor synaptic device is the basis for the implementation of simulation in CNN simulation. In a 5 × 7 device array, each synaptic device acts as a pixel point. By varying the intensity of the light pulse, nonvolatile current values of different intensities are obtained in the synaptic arrays (Figure S18a,b), and the extracted arrays of current values are simulated by CNN simulation to obtain the recognition accuracy of the final letters. For the recognition test, three patterned images including “N″, “I″ and “R″ were prepared. A data set of 100 different patterns was used for each image, with a training-to-test ratio of 8:2, as shown in Figure S19. The training process is a step-by-step learning process of the neural network, which can be tracked by the color of the diagonal lines in the confusion matrix. As shown in Figure 5c, the maximum inferred output value of each row matched the expected output value of each column, indicating that the alphabetic maps of “N″, “I″ and “R″ were successfully recognized. In addition to that, as the number of training sessions was raised, the loss value was seen to decrease (Figure 5d) and the recognition rate gradually increased to a saturation point, as can be seen in Figure 5e. A high recognition rate of more than 95% was achieved in less than 60 training sessions. This high CNN simulation recognition performance is closely related to the current values extracted from the phototransistors, in addition to the logic structure in the CNN. (43) Thus, it was successfully demonstrated that the constructed artificial synaptic system exhibited a highly accurate letter image recognition capability.