Optics and Precision Engineering, Volume. 17, Issue 5, 1181(2009)

Parallel VLSI architecture of discrete wavelet transform for JPEG2000

HAO Yan-ling and LIU Ying*
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  • [in Chinese]
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    In order to solve the problem that the Very Large Scale Integration(VLSI) architecture of a Discrete Wavelet Transform(DWT) wastes a huge amount of hardware resources,a parallel VLSI architecture based on the DWT for JPEG2000 is proposed. The architecture introduces a (9,7) wavelet parallel filtering technique based on the time difference,so that the row processor and the column processor can process the signals in a parallel way. By using a 2×2 transforming module,several kinds of registers can be used to substitute a lot of medium transforming memories. Experimental results show that the proposed architecture can efficiently decrease the hardware complexity and can improve hardware utilization to 100% nearly under the tight critical path. The architecture has been implemented in a post-route VHDL,and can be used as a compact and independent IP core for Voyage Data Recorder(VDR) radar image acquisition cards.

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    HAO Yan-ling, LIU Ying. Parallel VLSI architecture of discrete wavelet transform for JPEG2000[J]. Optics and Precision Engineering, 2009, 17(5): 1181

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    Paper Information

    Category:

    Received: Apr. 22, 2008

    Accepted: --

    Published Online: Oct. 28, 2009

    The Author Email: Ying LIU (liuying407@hrbeu.edu.cn)

    DOI:

    CSTR:32186.14.

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