With the rapid development of semiconductor devices, autonomous and controllable domestic multi-core heterogeneous FPGA devices have been vigorously promoted and applied in various fields, which has also promoted the development of optoelectronic information processing field. Infrared target detection and tracking technology has gradually become a key technology in this field. In the current photoelectric system, the principle design of airborne infrared target detection and tracking algorithm and its real-time improvement based on different hardware platforms have become a research focus. Domestic heterogeneous FPGA platform combined with multi-core ARM processor and FPGA logic resources, has strong system performance, flexibility and scalability, and becomes the preferred hardware platform for strong real-time processing system. Aiming at the problem of aerial infrared target acquisition and guidance in high-frame-rate and strong real-time photoelectric system, the architecture and implementation method of an aerial infrared target detection and tracking system based on domestic heterogeneous FPGA platform is proposed.A domestic heterogeneous FPGA-based aerial infrared target detection and tracking system is built in this paper. Based on AXI4 bus protocol, the methods of modularization and software and hardware collaborative design are adopted to construct the system architecture and the video pipeline (Fig.3). Median filtering was implemented by parallel pipeline processing (Fig.4). A fast aerial target detection algorithm based on background suppression is proposed through weighted two-dimensional spatial filtering pipeline processing (Fig.5 and Fig.6), and deployed in FPGA logic resource (PL) together with median filtering. The detection results are transmitted to the aerial target tracking module deployed on the FPGA processor (PS) in real time to complete the target tracking. Meanwhile, all functional modules of the system are controlled by PS. According to the series or parallel implementation method of each function module, the whole heterogeneous system is completed by overall deployment (Fig.8).The domestic heterogeneous FPGA-based aerial infrared target detection and tracking system is deployed on the hardware platform with Fudan Micro JFMQL100TAI heterogeneous FPGA chip as the core processing device. The logical resource occupancy rate of the whole system is less than 25%(Fig.10). Median filtering realizes image noise suppression and improves image quality (Fig.12). For different changes of target size, shape, pose and environmental interference such as thin cloud, the system can achieve accurate detection and stable tracking of the target (Fig.13 and Fig.14). At the same time, the function of this system is deployed on the three mainstream embedded domestic platforms for comparison. The experimental results demonstrate that the construction time of this system is the shortest, only 7.8 ms/ frame, and the system delay is 2 frames, forming the best solution to realize target detection and tracking based on heterogeneous FPGA. It can meet the requirements of 1280×1024@100 video real-time processing (Tab.1).The domestic heterogeneous FPGA-based aerial infrared target detection and tracking system, which is based on AXI4 bus protocol, adopts the methods of modularization and software and hardware collaborative design to construct the system architecture to realize target detection and tracking and the whole system control. The deployment and implementation methods of the main functional modules of the system on domestic heterogeneous FPGA hardware platform are described. This system can realize real-time detection and stable tracking of infrared aerial target in 1280×1024@100Hz video, with the resource occupancy was less than 25% and the system delay was less than 2 frames. Therefore, this system can meet the requirements of high frame frequency and strong real-time photoelectric system. The realization of this system is an important exploration for the engineering application of domestic autonomous controllable heterogeneous FPGA core chip.