Single photon detector is a kind of highly sensitive device that can realize single-photon-level signal detection. Compared with photomultiplier tubes (PMT) with large dark counts rate and large device sizes and superconducting single photon detectors (SSPD) with large-volume refrigeration devices and difficult integration into arrays, the single-photon avalanche photodiode (SPAD) with small size and easy integration into arrays exhibit the advantages of high speed, high sensitivity and high quantum efficiency. InGaAs has the characteristics of direct band gap, large ionization coefficient ratio and lattice constant matching with InP, which is currently the infrared detector material with the best performance in the near-infrared band. And InGaAs/InP SPAD is an ideal detector for active laser detection at 1.06 μm and 1.55 μm. Through the integrated packaging of high-efficiency InGaAs SAPD array and counting CMOS readout integrated circuit (ROIC), the obtained InGaAs SAPD focal plane detector has the characteristics of high sensitivity, high accuracy, small size, and solid-state packaging. The device has been widely used in 3D LIDAR, deep-space laser communication, sparse photon detection and other fields and a research hotspot in the field of single-photon detection in recent years.The research progress of InGaAs SAPD focal plane detector can be illustrated by the performance improvement of SPAD array chip and the application progress of ROIC. And the research progress of SPAD array chip includes the research progress of array scale and pixel center distance, crosstalk suppression, photo detection efficiency (PDE) and dark count rate (DCR). The array scale and pixel center spacing of the SPAD array chip determine the spatial resolution of the device. In the early stage, a single CMOS ROIC and a SPAD wafer were electrically connected by face-to-face bonding with epoxy resin, but the disadvantage was that it occupied a large area. Furthermore, by optimizing the device structure and using indium column interconnection, the pixel spacing of the device can be reduced to 50 μm (Fig. 5). In China, the 64×64 InGaAs SPAD focal plane detector developed by Chongqing Institute of Optoelectronic Technology is shown in Fig. 6, which has been successfully extended to 256×64, and the performance parameters are shown in Table1. For a SPAD large array device with high gain characteristics, a very small amount of photons or drift current generated by neighboring pixels is an important factor that generates crosstalk and affects imaging quality. Effective ways to reduce crosstalk include: using planar isolation trench method, setting spectral filter layer and spatial filter layer method (Fig. 7(c)), and pixel isolation technology combined with substrate removal. Among them, the pixel isolation technology can be applied to the manufacture of avalanche focal plane devices to ensure high detection efficiency and effectively suppress array pixel crosstalk. PDE and DCR are parameters that reflect the ability of a device to detect photons correctly. The PDE can be improved by optimizing the parameters of each material layer in the SPAD device structure through the established mathematical model. And DCR can be reduced by improving the quality of the epitaxial material. InGaAs SPAD focal plane detectors have different application directions such as 3D LIDAR, deep-space laser communication, sparse photon detection, thus there are also different solutions for CMOS ROIC. The Flash laser radar system that detects the laser echo by the SPAD array chip is suitable for the application that needs to accurately quantify the "photon time of flight". At present, the mainstream process node of the CMOS ROIC used for the SPAD array chip is 180 nm, which has the characteristics of low power consumption, high time resolution and high frame frequency. The lidar system using a large array of InGaAs SPAD focal plane detector can realize wide-area topographic mapping and fast imaging with an elevation difference of 1000-2500 m, with a resolution of ten-centimeters-level (Fig. 9). The high-sensitivity InGaAs SPAD focal plane detector with small size and integrated capture, tracking and communication can also be used as a receiver for ultra-long-distance laser communication links. Currently, asynchronous readout circuit architectures are available to meet the requirements of shorter readout times and larger data volumes than lidar in optical communication applications (Fig. 11). The InGaAs SPAD focal plane detector with asynchronous ROIC has realized the two-way laser communication link between the lunar orbit and the ground (Fig. 10), with a highest uplink transmission of hundred-Mbps-level. The avalanche focal plane with high PDE and low DCR can also be used to count the number of photons arriving at each pixel. In order to satisfy the counting function requirements, a readout circuit scheme with a counter is used, including counting overflow bit (Fig. 12), multi-statistical time data superposition, etc.SPAD is a photodetection device with high sensitivity and high temporal resolution. Develop infrared high-speed, low-noise focal plane devices based on the integration of InGaAs APD arrays and CMOS timing/counting ROIC, which can be widely used in single-photon-level signal detection for 1.06 μm and 1.55 μm optical fiber communications. The core of SPAD array chip development is to improve its performance, which requires larger array scale, smaller pixel center spacing, high spatial resolution, high PDE, low DCR, time jitter, and low crosstalk to obtain clearer target information. And CMOS ROIC are developing towards large arrays, small pixels, and multi-functions. At the same time, problems such as dynamic power consumption, bias voltage of deep submicron processes, and total output bandwidth need to be solved. Due to its excellent performance, the InGaAs SPAD focal plane detector is widely used in laser three-dimensional imaging, long-distance laser communication, sparse photon detection and other fields, and will continue to expand its application range in the future.