Microelectronics, Volume. 53, Issue 4, 553(2023)
A 402-405 MHz CMOS Low Power RF Transceiver
A super-regenerative transceiver with low power all-digital frequency locking and sensitivity calibration for the WBAN 402-405 MHz band was designed in a 018 μm CMOS process. A Balun low noise amplifier (Balun-LNA) with the noise-canceling technique was used to reduce the number of passive matching components and adapt to low voltage operation. The frequency tuning of the super-regenerative digital-control oscillator (SR-DCO) was realized by using digitally controlled capacitor arrays, which could eliminate the frequency drift of the oscillator during the quenching operation. The all-digital frequency-locked loop (ADFLL) replaced the frequency synthesizer to reduce the power consumption of the sensor node. The sensitivity calibration loop (SCL) shared components with the automatic amplitude control loop (AACL) to minimize errors, and could dynamically calibrate the receiver sensitivity without interrupting receive conditions. The simulation results show that the receiver sensitivity is -90 dBm, and the power consumption is 189 mW under the 1 V power supply voltage, in which the power consumption of the ADFLL is 78 μW. The power consumption of the transmitter is 196 mW, and the efficiency is 28%.
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WU Zhiwei, ZHANG Changchun. A 402-405 MHz CMOS Low Power RF Transceiver[J]. Microelectronics, 2023, 53(4): 553
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Received: Sep. 15, 2022
Accepted: --
Published Online: Jan. 3, 2024
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